Klaus Danne

According to our database1, Klaus Danne authored at least 20 papers between 2003 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2013
QuickRec: prototyping an intel architecture extension for record and replay of multithreaded programs.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

2009
Architecting a chunk-based memory race recorder in modern CMPs.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

2007
Server-based execution of periodic tasks on dynamically reconfigurable hardware.
IET Comput. Digit. Tech., 2007

2006
Real-time multitasking in embedded systems based on reconfigurable hardware.
PhD thesis, 2006

Dynamic reconfiguration of Distributed Arithmetic designs.
Int. J. Embed. Syst., 2006

An EDF schedulability test for periodic tasks on reconfigurable hardware devices.
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006

Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
Periodic Real-Time Scheduling for FPGA Computers.
Proceedings of the Third Workshop on Intelligent Solutions in Embedded Systems (WISES'05), 2005

Off-Line Placement of Tasks onto Reconfigurable Hardware Considering Geometrical Task Variants.
Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

An OS for Mobile Ad hoc Networks Using Ant Based Hueristic to Distribute Mobile Services.
Proceedings of the Joint International Conference on Autonomic and Autonomous Systems 2005 / International Conference on Networking and Services 2005, 2005

A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
Distributed arithmetic FPGA design with online scalable size and performance.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

Dynamic Reconfiguration of Distributed Arithmetic Controllers: Design Space Exploration and Trade-Off Analysis.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Operating Systems for FPGA Based Computers and Their Memory.
Proceedings of the ARCS 2004, 2004

2003
Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware.
EURASIP J. Adv. Signal Process., 2003

A new approach for reconfigurable massively parallel computers.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

Run-Time Exchange of Mechatronic Controllers Using Partial Hardware Reconfiguration.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Efficient Implementation of the Singular Value Decomposition on a Reconfigurable System.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003


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