Klaas Bult
Orcid: 0000-0002-4757-4250
According to our database1,
Klaas Bult
authored at least 28 papers
between 1988 and 2020.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2014, "For contributions to the design of high frequency analog and mixed signal circuits".
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2020
IEEE Trans. Circuits Syst., 2020
2018
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
2017
A 13mW 64dB SNDR 280MS/s pipelined ADC using linearized open-loop class-AB amplifiers.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2015
IEEE J. Solid State Circuits, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
A 66 dB SNDR pipelined split-ADC using class-AB residue amplifier with analog gain correction.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
IEEE J. Solid State Circuits, 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
11.4 A 1.5mW 68dB SNDR 80MS/s 2× interleaved SAR-assisted pipelined ADC in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the ESSCIRC 2014, 2014
Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceivers.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
A 375 mW Multimode DAC-Based Transmitter With 2.2 GHz Signal Bandwidth and In-Band IM3 < -58 dBc in 40 nm CMOS.
IEEE J. Solid State Circuits, 2013
2011
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2009
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2004
IEEE J. Solid State Circuits, 2004
1999
IEEE J. Solid State Circuits, 1999
1998
IEEE J. Solid State Circuits, 1998
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998
1997
IEEE J. Solid State Circuits, 1997
1992
IEEE J. Solid State Circuits, December, 1992
1990
IEEE J. Solid State Circuits, December, 1990
1989
Design and analysis of CMOS analog signal processing circuits by means of a graphical MOST model.
IEEE J. Solid State Circuits, June, 1989
1988
IEEE J. Solid State Circuits, June, 1988