Kjell O. Jeppson

According to our database, Kjell O. Jeppson authored at least 20 papers between 1987 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Timing- and power-driven ALU design training using spreadsheet-based arithmetic exploration.

Per Larsson-Edefors, Kjell O. Jeppson

Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014

2013

A learning tool MOSFET model: A stepping-stone from the square-law model to BSIM4.

Kjell O. Jeppson

Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Exploring prefix-tree adders using excel spreadsheets Setting up an explorative learning environment.

Kjell O. Jeppson, Per Larsson-Edefors

Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013

2008

Noise Interaction Between Power Distribution Grids and Substrate.

Daniel A. Andersson, Simon Kristiansson, Lars J. Svensson, Per Larsson-Edefors, Kjell O. Jeppson

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

A Student-Oriented Course in Digital VLSI Design.

Kjell O. Jeppson

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Evaluation of using active circuitry for substrate noise suppression.

Rashid Farivar, Simon Kristiansson, Fredrik Ingvarson, Kjell O. Jeppson

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

2006

Properties and modeling of ground structures for reducing substrate noise coupling in ICs.

Simon Kristiansson, Fredrik Ingvarson, Kjell O. Jeppson

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

A surface potential model for predicting substrate noise coupling in integrated circuits.

Simon Kristiansson, Fredrik Ingvarson, Shiva Prasad Kagganti, Nebojsa Simic, Marinel Zgrda, Kjell O. Jeppson

IEEE J. Solid State Circuits, 2005

2004

A surface potential model for predicting substrate noise coupling in integrated circuits.

Simon Kristiansson, Fredrik Ingvarson, Shiva Prasad Kagganti, Kjell O. Jeppson

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

1996

Comments on the metastable behavior of mismatched CMOS latches.

Kjell O. Jeppson

IEEE J. Solid State Circuits, 1996

1994

Modeling the influence of the transistor gain ratio and the input-to-output coupling capacitance on the CMOS inverter delay.

Kjell O. Jeppson

IEEE J. Solid State Circuits, June, 1994

Comments on the optimum CMOS tapered buffer problem.

Nils Hedenstiema, Kjell O. Jeppson

IEEE J. Solid State Circuits, February, 1994

1993

Formal definitions of edge-based geometric design rules.

Kjell O. Jeppson, Sven Christensson, Nils Hedenstierna

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

The halo algorithm-an algorithm for hierarchical design of rule checking of VLSI circuits.

Nils Hedenstierna, Kjell O. Jeppson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Comments on 'A module generator for optimized CMOS buffers'.

Nils Hedenstierna, Kjell O. Jeppson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1989

The Use of Inverse Layout Trees for Hierarchical Design Rule Checking.

Nils Hedenstierna, Kjell O. Jeppson

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988

A corner-based hierarchical circuit extractor.

Nils Hedenstierna, Kjell O. Jeppson

Integr., 1988

The use of inverse layout trees for hierarchical design verification.

Nils Hedenstierna, Kjell O. Jeppson

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1987

CMOS Circuit Speed and Buffer Optimization.

Nils Hedenstierna, Kjell O. Jeppson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

New algorithms for increased efficiency in hierarchical design rule checking.

Nils Hedenstierna, Kjell O. Jeppson

Integr., 1987