Kiyoshi Nakata

According to our database1, Kiyoshi Nakata authored at least 2 papers between 2006 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture.
IEEE J. Solid State Circuits, 2007

2006
A 40GOPS 250mW massively parallel processor based on matrix architecture.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


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