Kiyoshi Nakabayashi

According to our database1, Kiyoshi Nakabayashi authored at least 12 papers between 1990 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Course design investigation and trial on the subject of self-regulated learning using video content and online report submission.
Interact. Technol. Smart Educ., 2018

2017
Learning how to learn with knowledge building process through experiences in new employee training: a case study on learner-mentor interaction model.
Int. J. Knowl. Web Intell., 2017

2015
On Generic Communication Patterns between Courseware Objects in Extensible Learning Support System Architecture for Self- and Group Learning.
Proceedings of the 15th IEEE International Conference on Advanced Learning Technologies, 2015

2012
Application of Extensible Learning Support System Architecture to Collaborative Learning Environments.
Proceedings of the 12th IEEE International Conference on Advanced Learning Technologies, 2012

2007
Design and Implementation of a Mobile Learning Environment as an Extension of SCORM 2004 Specifications.
Proceedings of the 7th IEEE International Conference on Advanced Learning Technologies, 2007

2001
Trends of Learning Technology Standard.
Proceedings of the 2001 IEEE International Conference on Multimedia and Expo, 2001

Design and Implementation of WBT System Somponents and Test Tools for WBT Content Standards.
Proceedings of the Proceedings IEEE International Conference on Advanced Learning Technology: Issues, 2001

1997
CALAT: An intelligent CAI system using the World Wide Web.
Syst. Comput. Jpn., 1997

1996
An intelligent tutoring system on the WWW supporting interactive simulation environment with a multimedia viewer control mechanism.
Proceedings of WebNet 96, 1996

1995
A Rule-Embedded Neural-Network and Its Effectiveness in Pattern Recognition with III-Posed Conditions.
IEICE Trans. Inf. Syst., 1995

1990
The K2 Parallel Processor: Architecture and Hardware Implementation.
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

A Bus-Connected Multiprocessor for Run-Length-Based Image Processing.
Proceedings of the 1990 International Conference on Parallel Processing, 1990


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