Kimia Zamiri Azar

According to our database, Kimia Zamiri Azar authored at least 38 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

The Road Not Taken: eFPGA Accelerators Utilized for SoC Security Auditing.

Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark M. Tehranipoor, Farimah Farahmandi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024

Efficient SoC Security Monitoring: Quality Attributes and Potential Solutions.

Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Mark M. Tehranipoor, Farimah Farahmandi

IEEE Des. Test, August, 2024

Fuzzing for Automated SoC Security Verification: Challenges and Solution.

Muhammad Monir Hossain, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor

IEEE Des. Test, August, 2024

SiPGuard: Run-Time System-in-Package Security Monitoring via Power Noise Variation.

Tao Zhang, Md Latifur Rahman, Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi

IEEE Trans. Very Large Scale Integr. Syst., February, 2024

Heterogeneous Integration Supply Chain Integrity Through Blockchain and CHSM.

Paul Calzada, Md Sami Ul Islam Sami, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor

ACM Trans. Design Autom. Electr. Syst., January, 2024

Improving Bounded Model Checkers Scalability for Circuit De-Obfuscation: An Exploration.

Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor

IEEE Trans. Inf. Forensics Secur., 2024

Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration.

Md Sami Ul Islam Sami, Tao Zhang, Amit Mazumder Shuvo, Md. Saad Ul Haque, Paul Calzada, Kimia Zamiri Azar, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor

IEEE Access, 2024

HI-SST: Safeguarding SiP Authenticity Through Secure Split-Test in Heterogeneous Integration.

Paul Calzada, Md Sami Ul Islam Sami, Jingbo Zhou, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation.

Bulbul Ahmed, M. Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Fahim Rahman, Mark M. Tehranipoor

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

RL-TPG: Automated Pre-Silicon Security Verification through Reinforcement Learning-Based Test Pattern Generation.

Nurun Nahar Mondol, Arash Vafaei, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

GATE-SiP: Enabling Authenticated Encryption Testing in Systems-in-Package.

Galib Ibne Haidar, Kimia Zamiri Azar, Hadi Mardani Kamali, Mark M. Tehranipoor, Farimah Farahmandi

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

FormalFuzzer: Formal Verification Assisted Fuzz Testing for SoC Vulnerability Detection.

Nusrat Farzana Dipu, Muhammad Monir Hossain, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

TaintFuzzer: SoC Security Verification using Taint Inference-enabled Fuzzing.

Muhammad Monir Hossain, Nusrat Farzana Dipu, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic Locking.

Mohammad Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Hadi Mardani Kamali

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

PSC-Watermark: Power Side Channel Based IP Watermarking Using Clock Gates.

Upoma Das, M. Sazadur Rahman, N. Nalla Anandakumar, Kimia Zamiri Azar, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi

Proceedings of the IEEE European Test Symposium, 2023

QuardTropy: Detecting and Quantifying Unauthorized Information Leakage in Hardware Designs using g-entropy.

Hasan Al Shaikh, Mohammad Bin Monjil, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor, Fahim Rahman

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

EnSAFe: Enabling Sustainable SoC Security Auditing using eFPGA-based Accelerators.

Mridha Md Mashahedur Rahman, Shams Tarek, Kimia Zamiri Azar, Farimah Farahmandi

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

SheLL: Shrinking eFPGA Fabrics for Logic Locking.

Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

SoCFuzzer: SoC Vulnerability Detection using Cost Function enabled Fuzz Testing.

Muhammad Monir Hossain, Arash Vafaei, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

SHarPen: SoC Security Verification by Hardware Penetration Test.

Hasan Al Shaikh, Arash Vafaei, Mridha Md Mashahedur Rahman, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Advances in Logic Locking: Past, Present, and Prospects.

Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark M. Tehranipoor

IACR Cryptol. ePrint Arch., 2022

Fuzz, Penetration, and AI Testing for SoC Security Verification: Challenges and Solutions.

Kimia Zamiri Azar, Muhammad Monir Hossain, Arash Vafaei, Hasan Al Shaikh, Nurun N. Mondol, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi

IACR Cryptol. ePrint Arch., 2022

Warm Up before Circuit De-obfuscation? An Exploration through Bounded-Model-Checkers.

Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark M. Tehranipoor

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

2021

Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits.

Kimia Zamiri Azar, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, Christos P. Sotiriou, Avesta Sasan

IEEE Trans. Very Large Scale Integr. Syst., 2021

From Cryptography to Logic Locking: A Survey on the Architecture Evolution of Secure Scan Chains.

Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan

IEEE Access, 2021

ChaoLock: Yet Another SAT-hard Logic Locking using Chaos Computing.

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

2020

ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things.

Hadi Mardani Kamali, Kimia Zamiri Azar, Shervin Roshanisefat, Ashkan Vakil, Avesta Sasan

CoRR, 2020

DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain.

Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption.

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

InterLock: An Intercorrelated Logic and Routing Locking.

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures.

Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic.

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019

SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks.

Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019

COMA: Communication and Obfuscation Management Architecture.

Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan

Proceedings of the 22nd International Symposium on Research in Attacks, 2019

Threats on Logic Locking: A Decade Later.

Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Full-Lock: Hard Distributions of SAT instances for Obfuscating Circuits using Fully Configurable Logic and Routing Blocks.

Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

DuCNoC: A High-Throughput FPGA-Based NoC Simulator Using Dual-Clock Lightweight Router Micro-Architecture.

Hadi Mardani Kamali, Kimia Zamiri Azar, Shaahin Hessabi

IEEE Trans. Computers, 2018

LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection.

Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018