Kim M. Hazelwood
Orcid: 0000-0002-2713-8507
According to our database1,
Kim M. Hazelwood
authored at least 65 papers
between 2000 and 2024.
Collaborative distances:
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On csauthors.net:
Bibliography
2024
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2024
2023
2022
Object Intersection Captures on Interactive Apps to Drive a Crowd-sourced Replay-based Compiler Optimization.
ACM Trans. Archit. Code Optim., 2022
Proceedings of the Fifth Conference on Machine Learning and Systems, 2022
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022
Proceedings of the CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2, 2022
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022
Q-gym: An Equality Saturation Framework for DNN Inference Exploiting Weight Repetition.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022
2021
ACM Trans. Archit. Code Optim., 2021
IEEE Micro, 2021
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021
Proceedings of the LCTES '21: 22nd ACM SIGPLAN/SIGBED International Conference on Languages, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
2020
Proceedings of the Third Conference on Machine Learning and Systems, 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
2019
CoRR, 2019
Proceedings of the Second Conference on Machine Learning and Systems, SysML 2019, 2019
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
2018
Deep Learning Inference in Facebook Data Centers: Characterization, Performance Optimizations and Hardware Implications.
CoRR, 2018
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
Proceedings of the Thirteenth EuroSys Conference, 2018
2016
2014
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014
2012
ACM Trans. Archit. Code Optim., 2012
EcoSim: a language and experience teaching parallel programming in elementary school.
Proceedings of the 43rd ACM technical symposium on Computer science education, 2012
Proceedings of the 4th USENIX Workshop on Hot Topics in Parallelism, 2012
2011
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01732-2, 2011
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of 4th Workshop on General Purpose Processing on Graphics Processing Units, 2011
2010
ACM Trans. Archit. Code Optim., 2010
Proceedings of the 6th International Conference on Virtual Execution Environments, 2010
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2010
Proceedings of the 2010 International Conference on Compilers, 2010
2009
Challenges and opportunities at all levels: interactions among operating systems, compilers, and multicore processors.
ACM SIGOPS Oper. Syst. Rev., 2009
Proceedings of the 7th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 2009
Scalable support for multithreaded applications on dynamic binary instrumentation systems.
Proceedings of the 8th International Symposium on Memory Management, 2009
2008
Proceedings of the 4th International Conference on Virtual Execution Environments, 2008
Evaluating the impact of dynamic binary translation systems on hardware cache performance.
Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008
2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Proceedings of the High Performance Embedded Architectures and Compilers, 2007
Proceedings of the Fifth International Symposium on Code Generation and Optimization (CGO 2007), 2007
2006
ACM Trans. Archit. Code Optim., 2006
Proceedings of the Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 2006
Proceedings of the 2006 International Conference on Compilers, 2006
2005
Proceedings of the ACM SIGPLAN 2005 Conference on Programming Language Design and Implementation, 2005
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005
2004
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004
2003
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003
Proceedings of the 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 2003
2002
Proceedings of the 6th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-6 2002), 2002
2000
Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000