Kihyuk Han

According to our database1, Kihyuk Han authored at least 5 papers between 2009 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Enhanced algorithm of combining trace and scan signals in post-silicon validation.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Dynamic Trace Signal Selection for Post-Silicon Validation.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

2011
Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip.
J. Electron. Test., 2011

2010
At-speed Test of High-Speed DUT Using Built-Off Test Interface.
Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009
Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip.
Proceedings of the 14th IEEE European Test Symposium, 2009


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