Khoa Van Pham

Orcid: 0000-0002-6129-5856

According to our database1, Khoa Van Pham authored at least 6 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2019
Non-Ideal Effects of Memristor-CMOS Hybrid Circuits for Realizing Multiple-Layer Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Defect-Tolerant Crossbar Training of Memristor Ternary Neural Networks.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Defect-Tolerant and Energy-Efficient Training of Multi-Valued and Binary Memristor Crossbars for Near-Sensor Cognitive Computing.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2016
New pulse amplitude modulation for fine tuning of memristor synapses.
Microelectron. J., 2016

Memristor circuits and systems for future computing and bio-inspired information processing.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

Live demonstration: Memristor synaptic array with FPGA-implemented neurons for neuromorphic pattern recognition.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016


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