Khayrollah Hadidi
According to our database1,
Khayrollah Hadidi
authored at least 103 papers
between 1990 and 2022.
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Bibliography
2022
A new background continuous-time offset cancelation and gain calibration strategy for open-loop residue amplifiers in high-speed and high-resolution ADC's.
Int. J. Circuit Theory Appl., December, 2022
2021
A 12-Gb/s serial link transceiver using dual-mode pulse amplitude modulation scheme in a 0.18-μm CMOS process.
Int. J. Circuit Theory Appl., 2021
Circuits Syst. Signal Process., 2021
2020
J. Intell. Fuzzy Syst., 2020
IEEE Access, 2020
IEEE Access, 2020
2019
Microprocess. Microsystems, 2019
2018
A Histogram-Based Background Interstage Error Estimation and Implementation Method in Pipelined ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A foreground-liked continuous-time offset cancellation strategy for open-loop inter-stage amplifiers in high-resolution ADCs.
Integr., 2018
Low-jitter spread spectrum clock generator using charge pump frequency detector in 0.18 μm CMOS for USB3.1 transceivers.
IET Circuits Devices Syst., 2018
A low-power, fully programmable membership function generator using both transconductance and current modes.
Fuzzy Sets Syst., 2018
2016
A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Digitally-assisted offset cancellation technique for open loop residue amplifiers in high-resolution and high-speed ADCs.
Proceedings of the 2016 MIXDES, 2016
Proceedings of the 2016 MIXDES, 2016
Proceedings of the 2016 MIXDES, 2016
2015
Power and area reduction in CMOS analog fuzzy logic controllers by using a new inference engine structure.
J. Intell. Fuzzy Syst., 2015
J. Intell. Fuzzy Syst., 2015
A 80-MHz-to-410-MHz 16-Phases DLL Based on Improved Dead-Zone Open-Loop Phase Detector and Reduced-Gain Charge Pump.
J. Circuits Syst. Comput., 2015
A Wide-Range Low-Jitter PLL Based on Fast-Response VCO and Simplified Straightforward Methodology of Loop Stabilization in Integer-N PLLs.
J. Circuits Syst. Comput., 2015
J. Circuits Syst. Comput., 2015
IET Circuits Devices Syst., 2015
IET Circuits Devices Syst., 2015
Fuzzy Sets Syst., 2015
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
2014
A circuit implementation of an ultra high speed, low power analog fully programmable MFG.
J. Intell. Fuzzy Syst., 2014
J. Intell. Fuzzy Syst., 2014
J. Circuits Syst. Comput., 2014
A Fast and Low Settling error continuous-Time Common-mode feedback Circuit Based on differential difference amplifier.
J. Circuits Syst. Comput., 2014
J. Circuits Syst. Comput., 2014
A Fully Programmable Analog CMOS Rational-Powered Membership Function Generator with Continuously Adjustable High Precision Parameters.
Circuits Syst. Signal Process., 2014
A novel high-speed 4-bit carry generator with a new structure for arithmetic operations.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
A novel mixed-signal digital voltage mode CMOS fuzzy logic controller in 0.18μm technology.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014
2013
IEICE Electron. Express, 2013
CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
A circuit implementation of an ultra high speed, low power analog fully programmable MFG.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
A high speed and fully tunable MFG with new programmable CMOS OTA and new MIN circuit.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
Improved single-stage kickback-rejected comparator for high speed and low noise flash ADCs.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2012
IEICE Trans. Electron., 2012
Ultra High Speed Modified Booth Encoding Architecture for High Speed Parallel Accumulations.
IEICE Trans. Electron., 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
A 500 MS/s 600 µW 300 µm<sup>2</sup> Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35 µm 3.3 v CMOS Process.
IEICE Trans. Electron., 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Design of a programmable analog CMOS rational-powered membership function generator in current mode approach.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Effect of bandgap energy temperature dependence on thermal coefficient of bandgap reference voltage.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
IEICE Electron. Express, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejection.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Design of high-speed high-precision voltage-mode MAX-MIN circuits with low area and low power consumption.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Fuzzy Sets Syst., 2008
2007
J. Circuits Syst. Comput., 2007
A Current-Mode, First-Order Takagi-Sugeno-Kang Fuzzy Logic Controller, Supporting Rational-Powered Membership Functions.
IEICE Trans. Electron., 2007
Design of a New Folded Cascode Op-Amp Using Positive Feedback and Bulk Amplification.
IEICE Trans. Electron., 2007
Design of A New CMOS Controllable Mixed-Signal Current Mode Fuzzy Logic Controller (FLC) Chip.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Design of a High Speed, Low Latency and Low Power Consumption DRAM Using two-transistor Cell Structure.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2006
J. Circuits Syst. Comput., 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2005
IEICE Trans. Electron., 2005
A Highly Linear and Large Bandwidth Fully Differential CMOS Line Driver Suitable for High-Speed Data Transmission Applications.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the ESSCIRC 2003, 2003
2002
1998
A novel design technique for input differential pairs in single-ended operational amplifiers.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998
1996
Microprocessor based closed-loop speed control system for DC motor using power MOSFET.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
1994
A Novel Input Differential Pair for Improved Linearity Buffer and S/H Amplifier Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1990
IEEE J. Solid State Circuits, June, 1990