Khalil Yousef

Orcid: 0000-0003-2028-113X

According to our database1, Khalil Yousef authored at least 5 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Low Power Microarchitecture Designs of ACS Block in Viterbi Decoder: A Review.
Proceedings of the 13th International Conference on Information Communication and Management, 2023

2019
A 61-nW Level-Crossing ADC With Adaptive Sampling for Biomedical Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A High Conversion Gain Wideband Mixer Design for UWB Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A 0.0129 mm<sup>2</sup> DPLL With 1.6~2.0 ps RMS Period Jitter and 0.25-to-2.7 GHz Tunable DCO Frequency Range in 55-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A 1-to-1-kHz, 4.2-to-544-nW, Multi-Level Comparator Based Level-Crossing ADC for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018


  Loading...