Khalid Javeed

Orcid: 0000-0003-4645-4043

According to our database1, Khalid Javeed authored at least 25 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Privacy-preserving collaborative AI for distributed deep learning with cross-sectional data.
Multim. Tools Appl., October, 2024

E<sup>2</sup>CSM: efficient FPGA implementation of elliptic curve scalar multiplication over generic prime field GF(p).
J. Supercomput., January, 2024

GMC-crypto: Low latency implementation of ECC point multiplication for generic Montgomery curves over GF(p).
J. Parallel Distributed Comput., 2024

Using Intermittent Chaotic Clocks to Secure Cryptographic Chips.
CoRR, 2024

A Compact and Low Latency SPM Architecture for ECC Cryptosystems.
IEEE Access, 2024

Efficient Soft Core Multiplier for Post Quantum Digital Signatures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Area-time efficient point multiplication architecture on twisted Edwards curve over general prime field G F ( p ).
Int. J. Circuit Theory Appl., December, 2023

An Enhanced Intelligent Intrusion Detection System to Secure E-Commerce Communication Systems.
Comput. Syst. Sci. Eng., 2023

EC-Crypto: Highly Efficient Area-Delay Optimized Elliptic Curve Cryptography Processor.
IEEE Access, 2023

Security Provision by Using Detection and Prevention Methods to Ensure Trust in Edge-Based Smart City Networks.
IEEE Access, 2023

FPGA Implementation of Area-Time Aware ECC Scalar Multiplication Core.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
High-speed parallel reconfigurable Fp multipliers for elliptic curve cryptography applications.
Int. J. Circuit Theory Appl., 2022

2020
LUT-based high-speed point multiplier for Goldilocks-Curve448.
IET Comput. Digit. Tech., 2020

2019
Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor.
J. Circuits Syst. Comput., 2019

A Low-Cost Self-Test Architecture Integrated With PRESENT Cipher Core.
IEEE Access, 2019

2018
High-speed FPGA implementation of full-word Montgomery multiplier for ECC applications.
Microprocess. Microsystems, 2018

A high-speed RSD-based flexible ECC processor for arbitrary curves over general prime field.
Int. J. Circuit Theory Appl., 2018

2017
High performance hardware support for elliptic curve cryptography over general prime field.
Microprocess. Microsystems, 2017

Low latency flexible FPGA implementation of point multiplication on elliptic curves over GF(<i>p</i>).
Int. J. Circuit Theory Appl., 2017

2016
FPGA Based High Speed SPA Resistant Elliptic Curve Scalar Multiplier Architecture.
Int. J. Reconfigurable Comput., 2016

Speed and Area Optimized Parallel Higher-Radix Modular Multipliers.
IACR Cryptol. ePrint Arch., 2016

Design and Performance Comparison of Modular Multipliers Implemented on FPGA Platform.
Proceedings of the Cloud Computing and Security - Second International Conference, 2016

2015
Serial and parallel interleaved modular multipliers on FPGA platform.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
Radix-4 and radix-8 booth encoded interleaved modular multipliers over general Fp.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Efficient montgomery multiplier for pairing and elliptic curve based cryptography.
Proceedings of the 9th International Symposium on Communication Systems, 2014


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