Khaled R. Heloue

According to our database, Khaled R. Heloue authored at least 9 papers between 2005 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2012

Efficient Block-Based Parameterized Timing Analysis Covering All Potentially Critical Paths.

Khaled R. Heloue, Sari Onaissi, Farid N. Najm

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

2009

Full-Chip Model for Leakage-Current Estimation Considering Within-Die Correlation.

Khaled R. Heloue, Navid Azizi, Farid N. Najm

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

PSTA-based branch and bound approach to the silicon speedpath isolation problem.

Sari Onaissi, Khaled R. Heloue, Farid N. Najm

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Quantifying robustness metrics in parameterized static timing analysis.

Khaled R. Heloue, Chandramouli V. Kashyap, Farid N. Najm

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Clock skew optimization via wiresizing for timing sign-off covering all process corners.

Sari Onaissi, Khaled R. Heloue, Farid N. Najm

Proceedings of the 46th Design Automation Conference, 2009

2008

Early Analysis and Budgeting of Margins and Corners Using Two-Sided Analytical Yield Models.

Khaled R. Heloue, Farid N. Najm

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Parameterized timing analysis with general delay models and arbitrary variation sources.

Khaled R. Heloue, Farid N. Najm

Proceedings of the 45th Design Automation Conference, 2008

2007

Modeling and Estimation of Full-Chip Leakage Current Considering Within-Die Correlation.

Khaled R. Heloue, Navid Azizi, Farid N. Najm

Proceedings of the 44th Design Automation Conference, 2007

2005

Statistical timing analysis with two-sided constraints.

Khaled R. Heloue, Farid N. Najm

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005