Khaled Benkrid
According to our database1,
Khaled Benkrid
authored at least 106 papers
between 1999 and 2015.
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Bibliography
2015
Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS).
ACM Trans. Reconfigurable Technol. Syst., 2015
Dynamic partial reconfiguration implementation of the SVM/KNN multi-classifier on FPGA for bioinformatics application.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015
2014
2013
R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs.
IEEE Trans. Computers, 2013
IEEE Trans. Computers, 2013
SIGARCH Comput. Archit. News, 2013
Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence.
Int. J. Reconfigurable Comput., 2013
A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures.
Digit. Signal Process., 2013
Proceedings of the Real-Time Image and Video Processing 2013, 2013
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Reconfiguration-based implementation of SVM classifier on FPGA for Classifying Microarray data.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013
Multiple-clone configuration of relocatable partial bitstreams in Xilinx Virtex FPGAs.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013
2012
J. Signal Process. Syst., 2012
SIGARCH Comput. Archit. News, 2012
SIGARCH Comput. Archit. News, 2012
ACM Trans. Comput. Educ., 2012
Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA-Based Supercomputer.
J. Comput., 2012
Novel Dynamic Partial Reconfiguration Implementation of K-Means Clustering on FPGAs: Comparative Results with GPPs and GPUs.
Int. J. Reconfigurable Comput., 2012
High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP.
Int. J. Reconfigurable Comput., 2012
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 5th IAPR International Conference on Biometrics, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
An adaptive FPGA implementation of multi-core K-nearest neighbour ensemble classifier using dynamic partial reconfiguration.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
An adaptive implementation of a dynamically reconfigurable K-nearest neighbour classifier on FPGA.
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
Real-time CCSDS lossless adaptive hyperspectral image compression on parallel GPGPU & multicore processor systems.
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
2011
High Performance Phylogenetic Analysis With Maximum Parsimony on Reconfigurable Hardware.
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Embed. Syst. Lett., 2011
Snake: An Efficient Strategy for the Reuse of Circuitry and Partial Computation Results in High-Performance Reconfigurable Computing.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Highly Parameterized K-means Clustering on FPGAs: Comparative Results with GPPs and GPUs.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011
High performance Intra-task parallelization of Multiple Sequence Alignments on CUDA-compatible GPUs.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
A high performance implementation for Molecular Dynamics simulations on a FPGA supercomputer.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
Enabling FPGAs for future deep space exploration missions: Improving fault-tolerance and computation density with R3TOS.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
An FPGA-based parameterised and scalable optimal solutions for pairwise biological sequence analysis.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
FPGA implementation of K-means algorithm for bioinformatics application: An accelerated approach to clustering Microarray data.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
ACM Trans. Reconfigurable Technol. Syst., 2010
Design and implementation of a CUDA-compatible GPU-based core for gapped BLAST algorithm.
Proceedings of the International Conference on Computational Science, 2010
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
2009
A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment.
IEEE Trans. Very Large Scale Integr. Syst., 2009
Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension.
IEEE Trans. Very Large Scale Integr. Syst., 2009
A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation.
Comput. Sci. Res. Dev., 2009
A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
A Comparative Study on ASIC, FPGAs, GPUs and General Purpose Processors in the O(N^2) Gravitational N-body Simulation.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
Rapid Prototyping of an Improved Cholesky Decomposition Based MIMO Detector on FPGAs.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
2008
Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method.
Eng. Lett., 2008
Massively Parallelized Quasi-Monte Carlo financial Simulation on a FPGA Supercomputer.
Proceedings of the 2008 Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications, 2008
Design and implementation of a high performance financial Monte-Carlo simulation engine on an FPGA supercomputer.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008
Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008
High performance FPGA-based core for BLAST sequence alignment with the two-hit method.
Proceedings of the 8th IEEE International Conference on Bioinformatics and Bioengineering, 2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
2007
J. Syst. Archit., 2007
Proceedings of the IEEE International Conference on Acoustics, 2007
Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007
Power Efficient Domain-Specific Reconfigurable Architectures for System-on-Chip Applications.
Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007
2006
Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction.
Signal Process., 2006
Microprocess. Microsystems, 2006
2005
An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005
Proceedings of the Seventh International Workshop on Computer Architectures for Machine Perception (CAMP 2005), 2005
2004
From application descriptions to hardware in seconds: a logic-based approach to bridging the gap.
IEEE Trans. Very Large Scale Integr. Syst., 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
2003
J. Electronic Imaging, 2003
Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT.
Proceedings of the Seventh International Symposium on Signal Processing and Its Applications, 2003
A novel approach for diminishing and predicting the error dynamic range in finite wordlength FIR based architectures.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003
Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003
A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003
Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003
2002
Towards a general framework for FPGA based image processing using hardware skeletons.
Parallel Comput., 2002
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Third International Workshop on Digital and Computational Video, 2002
2001
High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001
Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001
2000
Proceedings of the IEEE International Conference on Acoustics, 2000
1999
J. Syst. Archit., 1999