Khai-Duy Nguyen

Orcid: 0000-0003-3623-5250

Affiliations:

University of Electro-Communications, Tokyo, Japan

According to our database¹, Khai-Duy Nguyen authored at least 16 papers between 2020 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2024

Accumulator-Based 16-Bit Processor for Wireless Sensor Nodes.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

Realization of Authenticated One-Pass Key Establishment on RISC-V Micro-Controller for IoT Applications.

[BibT_eX]

[DOI]

Future Internet, May, 2024

A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

RISC-V-Based System-on-Chips for IoT Applications.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE Hot Chips Symposium, 2024

A Trusted Execution Environment RISC-V System on Chip.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE Hot Chips Symposium, 2024

2022

Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling.

[BibT_eX]

[DOI]

IEEE Access, 2022

A System-on-Chip for IoT Applications with 16-bit Tiny Processor.

[BibT_eX]

[DOI]

Tuan-Kiet Dang

Khai-Duy Nguyen

Quynh Nguyen Quang Nhu

Trong-Thuc Hoang

Cong-Kha Pham

Proceedings of the International Conference on IC Design and Technology, 2022

2021

A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction.

[BibT_eX]

[DOI]

Khai-Duy Nguyen

Tuan-Kiet Dang

Trong-Thuc Hoang

Quynh Nguyen Quang Nhu

Xuan-Tu Tran

Cong-Kha Pham

IEICE Electron. Express, 2021

A proposal for enhancing training speed in deep learning models based on memory activity survey.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2021

A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse.

[BibT_eX]

[DOI]

IEEE Access, 2021

A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-Chip.

[BibT_eX]

[DOI]

Khai-Duy Nguyen

Tuan-Kiet Dang

Trong-Thuc Hoang

Quynh Nguyen Quang Nhu

Cong-Kha Pham

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

2020

Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB).

[BibT_eX]

[DOI]

Quynh Nguyen Quang Nhu

IEICE Electron. Express, 2020

Khai-Duy Nguyen

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