Kevin Reick

According to our database, Kevin Reick authored at least 6 papers between 2002 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Post-Silicon Validation of the IBM POWER9 Processor.

Tom Kolan, Hillel Mendelson, Vitali Sokhin, Kevin Reick, Elena Tsanko, Greg Wetli

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2015

Debugging post-silicon fails in the IBM POWER8 bring-up lab.

Manoj Dusanapudi, S. Fields, Michael S. Floyd, Guy L. Guthrie, Ronald N. Kalla, Shakti Kapoor, L. S. Leitner, Charles F. Marino, Joseph McGill, Amir Nahir, Kevin Reick, H. Shen, K. L. Wright

IBM J. Res. Dev., 2015

2014

Post-Silicon Validation of the IBM POWER8 Processor.

Amir Nahir, Manoj Dusanapudi, Shakti Kapoor, Kevin Reick, Wolfgang Roesner, Klaus-Dieter Schubert, Keith Sharp, Greg Wetli

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2008

Fault-Tolerant Design of the IBM Power6 Microprocessor.

Kevin Reick, Pia N. Sanda, Scott B. Swaney, Jeffrey W. Kellington, Michael J. Mack, Michael S. Floyd, Daniel Henderson

IEEE Micro, 2008

2002

Power4 System Design for High Reliability.

Douglas C. Bossen, Joel M. Tendler, Kevin Reick

IEEE Micro, 2002

Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology.

Douglas C. Bossen, Alongkorn Kitamorn, Kevin Reick, Michael S. Floyd

IBM J. Res. Dev., 2002