Kevin Kai-Wei Chang

According to our database, Kevin Kai-Wei Chang authored at least 13 papers between 2012 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

DASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators.

Hiroyuki Usui, Lavanya Subramanian, Kevin Kai-Wei Chang, Onur Mutlu

ACM Trans. Archit. Code Optim., 2016

A case for hierarchical rings with deflection routing: An energy-efficient on-chip communication substrate.

Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu

Parallel Comput., 2016

Adaptive-Latency DRAM (AL-DRAM).

Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu

CoRR, 2016

Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism.

Kevin Kai-Wei Chang, Gabriel H. Loh, Mithuna Thottethodi, Yasuko Eckert, Mike O'Connor, Srilatha Manne, Lisa Hsu, Lavanya Subramanian, Onur Mutlu

CoRR, 2016

Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses.

Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu

CoRR, 2016

Achieving both High Energy Efficiency and High Performance in On-Chip Communication using Hierarchical Rings with Deflection Routing.

Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu

CoRR, 2016

2015

SQUASH: Simple QoS-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators.

Hiroyuki Usui, Lavanya Subramanian, Kevin Kai-Wei Chang, Onur Mutlu

CoRR, 2015

Adaptive-latency DRAM: Optimizing DRAM timing for the common-case.

Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014

Design and Evaluation of Hierarchical Rings with Deflection Routing.

Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu

Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014

Improving DRAM performance by parallelizing refreshes with accesses.

Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2012

HAT: Heterogeneous Adaptive Throttling for On-Chip Networks.

Kevin Kai-Wei Chang, Rachata Ausavarungnirun, Chris Fallin, Onur Mutlu

Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

MinBD: Minimally-Buffered Deflection Routing for Energy-Efficient Interconnect.

Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Kai-Wei Chang, Rachata Ausavarungnirun, Onur Mutlu

Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems.

Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lavanya Subramanian, Gabriel H. Loh, Onur Mutlu

Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012