Keren Zhu

Orcid: 0000-0003-2698-141X

Affiliations:
  • Chinese University of Hong Kong, Hong Kong
  • University of Texas at Austin, ECE Department, TX, USA


According to our database1, Keren Zhu authored at least 38 papers between 2019 and 2024.

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Bibliography

2024
ISOP+: Machine Learning-Assisted Inverse Stack-Up Optimization for Advanced Package Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis.
CoRR, 2024

Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement.
CoRR, 2024

LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generation.
CoRR, 2024

The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.
CoRR, 2024

Multi-Electrostatics Based Placement for Non-Integer Multiple-Height Cells.
Proceedings of the 2024 International Symposium on Physical Design, 2024

A Data-Driven Analog Circuit Synthesizer with Automatic Topology Selection and Sizing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Performance-driven Analog Routing via Heterogeneous 3DGNN and Potential Relaxation.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper).
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper).
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

ISOP-Yield: Yield-Aware Stack-Up Optimization for Advanced Package using Machine Learning.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
An In-Memory-Computing Charge-Domain Ternary CNN Classifier.
IEEE J. Solid State Circuits, May, 2023

Tutorial and Perspectives on MAGICAL: A Silicon-Proven Open-Source Analog IC Layout System.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal Flow.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Joint Optimization of Sizing and Layout for AMS Designs: Challenges and Opportunities.
Proceedings of the 2023 International Symposium on Physical Design, 2023

Reinforcement Learning Guided Detailed Routing for Custom Circuits.
Proceedings of the 2023 International Symposium on Physical Design, 2023

AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies.
Proceedings of the ISPD 2022: International Symposium on Physical Design, Virtual Event, Canada, March 27, 2022

Fuse and Mix: MACAM-Enabled Analog Activation for Energy-Efficient Neural Acceleration.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

TAG: Learning Circuit Spatial Embedding from Layouts.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Reinforcement Learning for Electronic Design Automation: Case Studies and Perspectives: (Invited Paper).
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

Generative-Adversarial-Network-Guided Well-Aware Placement for Analog Circuits.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

Automating Analog Constraint Extraction: From Heuristics to Learning: (Invited Paper).
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII.
IEEE Des. Test, 2021

Optimizer Fusion: Efficient Training with Better Locality and Parallelism.
CoRR, 2021

OpenSAR: An Open Source Automated End-to-end SAR ADC Compiler.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Universal Symmetry Constraint Extraction for Analog and Mixed-Signal Circuits with Graph Neural Networks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
Exploring Logic Optimizations with Reinforcement Learning and Graph Convolutional Network.
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Toward Silicon-Proven Detailed Routing for Analog and Mixed-Signal Circuits.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

An Efficient Training Framework for Reversible Neural Architectures.
Proceedings of the Computer Vision - ECCV 2020, 2020

Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Closing the Design Loop: Bayesian Optimization Assisted Hierarchical Analog Layout Synthesis.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

S<sup>3</sup>DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance.
Proceedings of the International Conference on Computer-Aided Design, 2019

MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper.
Proceedings of the International Conference on Computer-Aided Design, 2019


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