Kenzo Okuda

According to our database1, Kenzo Okuda authored at least 15 papers between 1980 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2016
Energy-efficient high-speed search engine using a multi-dimensional TCAM architecture with parallel pipelined subdivided structure.
Proceedings of the 13th IEEE Annual Consumer Communications & Networking Conference, 2016

2013
2D Sliced Packet Buffer with traffic volume and buffer occupancy adaptation for power saving.
Proceedings of the 10th IEEE Consumer Communications and Networking Conference, 2013

1995
A Strategy for Forgetting Cases by Restricting Memory.
IEICE Trans. Inf. Syst., 1995

1992
An Application of Case-Based Reasoning for Fault Restoration Support in Electric Power Systems.
Proceedings of the Personal Computers and Intelligent Systems, 1992

1988
Unification parallelism for prolog processing.
Syst. Comput. Jpn., 1988

Fast processing of an object-oriented language by a low-level parallel computer munap.
Syst. Comput. Jpn., 1988

1987
A visual microprogramming system.
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

1986
Architectural evaluation of a universal host computer munap.
Syst. Comput. Jpn., 1986

Data Abstraction Technique for Relational Database Query Processing.
Syst. Comput. Jpn., 1986

Software testing system supported by a computer architecture.
Syst. Comput. Jpn., 1986

Architectural Evaluation and Improvement of a Universal Host Computer MUNAP.
Proceedings of the Information Processing 86, 1986

1984
Compaction of two-level microprograms for a multiprocessor computer.
Proceedings of the 17th annual workshop on Microprogramming, 1984

1983
Hierarchical Micro-Architectures of a Two-Level Microprogrammed Multiprocessor Computer.
Proceedings of the International Conference on Parallel Processing, 1983

1982
A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions.
IEEE Trans. Computers, 1982

1980
MUNAP - A Two-Level Microprogrammed Multiprocessor Architecture for Nonnumeric Processing.
Proceedings of the Information Processing, Proceedings of the 8th IFIP Congress 1980, Tokyo, Japan - October 6-9, 1980 and Melbourne, Australia, 1980


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