Kentaro Yoshioka

Orcid: 0000-0001-5640-2250

According to our database1, Kentaro Yoshioka authored at least 41 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 4.6-400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC With PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration.
IEEE J. Solid State Circuits, March, 2024

PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation.
CoRR, 2024

LiDAR Spoofing Meets the New-Gen: Capability Improvements, Broken Assumptions, and New Attack Strategies.
Proceedings of the 31st Annual Network and Distributed System Security Symposium, 2024

34.5 A 818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling.
CoRR, 2023

Revisiting LiDAR Spoofing Attack Capabilities against Object Detection: Improvements, Measurement, and New Attack.
CoRR, 2023

An 818-TOPS/W CSNR-31dB SQNR-45dB 10-bit Capacitor-Reconfiguring Computing-in-Memory Macro with Software-Analog Co-Design for Transformers.
CoRR, 2023

A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC with Pole-Aware Bias Calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
A Tutorial and Review of Automobile Direct ToF LiDAR SoCs: Evolution of Next-Generation LiDARs.
IEICE Trans. Electron., October, 2022

Time-Based Current Source: A Highly Digital Robust Current Generator for Switched Capacitor Circuits.
IEICE Trans. Electron., 2022

Poster: Towards Large-Scale Measurement Study on LiDAR Spoofing Attacks against Object Detection.
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021
VCO-Based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2021

2020
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm<sup>2</sup> Voltage/Time Dual-Data-Converter-Based AFE.
IEEE J. Solid State Circuits, 2020


5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm<sup>2</sup> Voltage/Time Dual-Data-Converter-Based AFE.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2019

An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators.
IEEE J. Solid State Circuits, 2019

Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models.
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019

2018
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC.
IEEE J. Solid State Circuits, 2018

An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer.
IEEE J. Solid State Circuits, 2018

Training Domain Specific Models for Energy-Efficient Object Detection.
CoRR, 2018

PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for in-Sensor-Computed Deep Learning Accelerators.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018


A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
28.7 A 0.7V 12b 160MS/s 12.8fJ/conv-step pipelined-SAR ADC in 28nm CMOS with digital amplifier technique.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015
An 8 bit 0.3-0.8 V 0.2-40 MS/s 2-bit/Step SAR ADC With Successively Activated Threshold Configuring Comparators in 40 nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Dynamic Architecture and Frequency Scaling in 0.8-1.2 GS/s 7 b Subranging ADC.
IEEE J. Solid State Circuits, 2015

2014
7-bit 0.8-1.2GS/s Dynamic Architecture and Frequency Scaling subrange ADC with binary-search/flash Live Configuring Technique.
Proceedings of the Symposium on VLSI Circuits, 2014

A 13b SAR ADC with eye-opening VCO based comparator.
Proceedings of the ESSCIRC 2014, 2014

An 8b extremely area efficient threshold configuring SAR ADC with source voltage shifting technique.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
A 0.5-V 5.2-fJ/Conversion-Step Full Asynchronous SAR ADC With Leakage Power Reduction Down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS.
IEEE J. Solid State Circuits, 2013

A 4-10 bit, 0.4-1 V Power Supply, Power Scalable Asynchronous SAR-ADC in 40 nm-CMOS with Wide Supply Voltage Range SAR Controller.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

An Adaptive DAC Settling Waiting Time Optimized Ultra Low Voltage Asynchronous SAR ADC in 40 nm CMOS.
IEICE Trans. Electron., 2013

A voltage scaling 0.25-1.8 V delta-sigma modulator with inverter-opamp self-configuring amplifier.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2007
Efficacy of Interferon Treatment for Chronic Hepatitis C Predicted by Feature Subset Selection and Support Vector Machine.
J. Medical Syst., 2007

2006
Support Vector Machine-Based Feature Selection for Classification of Liver Fibrosis Grade in Chronic Hepatitis C.
J. Medical Syst., 2006


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