Kentaro Orimo

According to our database, Kentaro Orimo authored at least 5 papers between 2016 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W.

Kota Ando, Kodai Ueyoshi, Kentaro Orimo, Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Tetsuya Asai, Tadahiro Kuroda, Masato Motomura

IEEE J. Solid State Circuits, 2018

2017

In-memory area-efficient signal streaming processor design for binary neural networks.

Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara, Kota Ando, Kodai Ueyoshi, Kazutoshi Hirose, Kentaro Orimo, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Tetsuya Asai, Masato Motomura

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Exploring optimized accelerator design for binarized convolutional neural networks.

Kodai Ueyoshi, Kota Ando, Kentaro Orimo, Masayuki Ikebe, Tetsuya Asai, Masato Motomura

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Logarithmic Compression for Memory Footprint Reduction in Neural Network Training.

Kazutoshi Hirose, Ryota Uematsu, Kota Ando, Kentaro Orimo, Kodai Ueyoshi, Masayuki Ikebe, Tetsuya Asai, Shinya Takamaeda-Yamazaki, Masato Motomura

Proceedings of the Fifth International Symposium on Computing and Networking, 2017

2016

FPGA architecture for feed-forward sequential memory network targeting long-term time-series forecasting.

Kentaro Orimo, Kota Ando, Kodai Ueyoshi, Masayuki Ikebe, Tetsuya Asai, Masato Motomura

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016