Kent Edrian Lozada
Orcid: 0000-0002-5858-0453
According to our database1,
Kent Edrian Lozada
authored at least 7 papers
between 2021 and 2024.
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Bibliography
2024
A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma Modulator With Digital Noise Coupling.
IEEE J. Solid State Circuits, October, 2024
DR Loss-Free Dithering-Based Digital Background Linearity Calibration for SAR-Assisted Multi-Stage ADCs With Digital Input-Interference Cancellation.
IEEE Open J. Circuits Syst., 2024
A 0.38mW 200kHz-BW 92.1dB-DR Single-Opamp 4th-Order Continuous-Time Delta-Sigma Modulator with 3<sup>rd</sup>-Order Noise Coupling.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
A 100kHz-BW 99dB-DR Continuous-Time Tracking-Zoom Incremental ADC with Residue-Gain Switching and Digital NC-FF.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
A 25kHz-BW 97.4dB-SNDR 100.2dB-DR 3<sup>rd</sup>-Order SAR-Assisted CT DSM with 1-0 MASH and DNC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
A 4<sup>th</sup>-Order Continuous-Time Delta-Sigma Modulator With Hybrid Noise-Coupling.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
2021
A 4th-order CT I-DSM with Digital Noise Coupling and Input Pre-conversion Method for Initialization.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021