Kensuke Shimizu
According to our database1,
Kensuke Shimizu
authored at least 24 papers
between 1986 and 2023.
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Bibliography
2023
Plane-Wave Spectrum Analysis of Spherical Wave Absorption and Reflection by Metasurface Absorber.
IEICE Trans. Commun., November, 2023
2022
Soft Robotic Hand With Finger-Bending/Friction-Reduction Switching Mechanism Through 1-Degree-of-Freedom Flow Control.
IEEE Robotics Autom. Lett., 2022
2015
Brain-Robot Interfaces Using Spatial Tactile BCI Paradigms - Symbiotic Brain-Robot Applications.
Proceedings of the Symbiotic Interaction - 4th International Workshop, 2015
Inter-stimulus interval study for the tactile point-pressure brain-computer interface.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015
2014
Proceedings of the 2014 Joint 7th International Conference on Soft Computing and Intelligent Systems (SCIS) and 15th International Symposium on Advanced Intelligent Systems (ISIS), 2014
Virtual reality feedback environment for brain computer interface paradigm using tactile and bone-conduction auditory modality paradigms.
Proceedings of the 2014 Joint 7th International Conference on Soft Computing and Intelligent Systems (SCIS) and 15th International Symposium on Advanced Intelligent Systems (ISIS), 2014
2006
Modulo (2<sup>p</sup> plusminus 1) Multipliers Using a Three-operand Modular Signed-digit Addition Algorithm.
J. Circuits Syst. Comput., 2006
Proceedings of the Japan-China Joint Workshop on Frontier of Computer Science and Technology, 2006
2005
Dynamic Range Compression Characteristics Using an Interpolating Polynomial for Digital Audio Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
2004
IEICE Trans. Inf. Syst., 2004
2003
Residue Checker with Signed-Digit Arithmetic for Error Detection of Arithmetic Circuits.
J. Circuits Syst. Comput., 2003
Modulo (2<sup>p</sup> ± 1) multipliers using a three-operand modular addition and Booth recoding based on signed-digit number arithmetic.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Residue signed-digit arithmetic circuit with a complement of modulus and the application to RSA encryption processor.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Fast modular multiplication using Booth recoding based on signed-digit number arithmetic.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Error Detection of Arithmetic Circuits Using a Residue Checker with Signed-Digit Number System.
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
Exor Decomposition with Common Variables and its Application to Multiple-Output Networks.
J. Circuits Syst. Comput., 1999
Residue Arithmetic Multiplier Based on the Radix-4 Signed-Digit Multiple-Valued Arithmetic Circuits.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
1998
Residue Arithmetic Circuits Based on the Signed-Digit Multiple-Valued Arithmetic Circuits.
Proceedings of the 28th IEEE International Symposium on Multiple-Valued Logic, 1998
1992
Syst. Comput. Jpn., 1992
1986
Syst. Comput. Jpn., 1986