Kenny Johansson
According to our database1,
Kenny Johansson
authored at least 20 papers
between 2004 and 2011.
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Bibliography
2011
Minimum adder depth multiple constant multiplication algorithm for low power FIR filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IET Comput. Digit. Tech., 2008
Power optimization of weighted bit-product summation tree for elementary function generator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008
Comparison of multiplierless implementation of nonlinear-phase versus linear-phase FIR filters.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008
2007
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Implementation of Polyphase Decomposed FIR Filters for Interpolation and Decimation Using Multiple Constant Multiplication Techniques.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
A detailed complexity model for multiple constant multiplication and an algorithm to minimize the complexity.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
A Power-Efficient, Low-Complexity, Memoryless Coding Scheme for Buses with Dominating Inter-Wire Capacitances.
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004
Switching activity in bit-serial constant-coefficient multipliers.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004