Kenneth Y. Yun

Affiliations:
  • University of California, San Diego, USA


According to our database1, Kenneth Y. Yun authored at least 42 papers between 1992 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
An efficient wireless switching architecture.
Proceedings of the 2010 Wireless Telecommunications Symposium, 2010

2008
A low SINR synchronization system for direct-sequence spread-spectrum communications: radio prototype, verification testbed and experimental results.
Proceedings of the 4th International Conference on Testbeds & Research Infrastructures for the DEvelopment of NeTworks & COMmunities (TRIDENTCOM 2008), 2008

2007
Synchronization at Low SINR in Asynchronous Direct-Sequence Spread-Spectrum Communications.
Proceedings of the Second International Conference on Systems and Networks Communications (ICSNC 2007), 2007

2006
Packet detection and acquisition at low SINR in spread-spectrum based wireless communications.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2006

2004
QoS Enabled Broadband Access Through Optical Rings.
Proceedings of the 29th Annual IEEE Conference on Local Computer Networks (LCN 2004), 2004

2001
A Terabit Multiservice Switch.
IEEE Micro, 2001

An asynchronous instruction length decoder.
IEEE J. Solid State Circuits, 2001

2000
A self-timed real-time sorting network.
IEEE Trans. Very Large Scale Integr. Syst., 2000

1999
Pausible clocking-based heterogeneous systems.
IEEE Trans. Very Large Scale Integr. Syst., 1999

Automatic synthesis of extended burst-mode circuits. II. (Automaticsynthesis).
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Automatic synthesis of extended burst-mode circuits. I.(Specification and hazard-free implementations).
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Average-case technology mapping of asynchronous burst-mode circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Timing analysis of asynchronous systems using time separation of events.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Min-max timing analysis and an application to asynchronous circuits.
Proc. IEEE, 1999

A 40 Gb/s packet switching architecture with fine-grained priorities.
Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1999), 1999

A scalable priority queue manager architecture for output-buffered ATM switches.
Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1999), 1999

Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces.
Proceedings of the 36th Conference on Design Automation, 1999

RAPPID: An Asynchronous Instruction Length Decoder.
Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999

Optimal Evaluation Clocking of Self-Resetting Domino Pipelines.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

Recent Advances in Asynchronous Design Methodologies.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines.
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1998
The design and verification of a high-performance low-control-overhead asynchronous differential equation solver.
IEEE Trans. Very Large Scale Integr. Syst., 1998

A low-power VLSI architecture for full-search block-matching motion estimation.
IEEE Trans. Circuits Syst. Video Technol., 1998

BDD-based synthesis of extended burst-mode controllers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

Practical timing analysis of asynchronous circuits using time separation of events.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

Average-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.
Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March, 1998

Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.
Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March, 1998

1997
Practical Advances in Asynchronous Design.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders.
Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997

Timing Analysis of Extended Burst-Mode Circuits.
Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997

1996
Pausible Clocking: A First Step Toward Heterogeneous Systems.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

Automatic synthesis of extended burst-mode circuits using generalized C-elements.
Proceedings of the conference on European design automation, 1996

A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits.
Proceedings of the conference on European design automation, 1996

High-performance asynchronous pipeline circuits.
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

Optimizing average-case delay in technology mapping of burst-mode circuits.
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

1995
A high-performance asynchronous SCSI controller.
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

Estimation and bounding of energy consumption in burst-mode control circuits.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994
Performance-driven synthesis of asynchronous controllers.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Unifying synchronous/asynchronous state machine synthesis.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
Synthesis of 3D Asynchronous State Machines.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Practical Asynchronous Controller Design.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Automatic synthesis of 3D asynchronous state machines.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992


  Loading...