Kenneth P. Parker

According to our database1, Kenneth P. Parker authored at least 40 papers between 1975 and 2012.

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Bibliography

2012
Capacitive sensing testability in complex memory devices.
Proceedings of the 2012 IEEE International Test Conference, 2012

2011
Surviving state disruptions caused by test: A case study.
Proceedings of the 2011 IEEE International Test Conference, 2011

2010
Surviving state disruptions caused by test: The "Lobotomy Problem".
Proceedings of the 2011 IEEE International Test Conference, 2010

Principal Component Analysis-based compensation for measurement errors due to mechanical misalignments in PCB testing.
Proceedings of the 2011 IEEE International Test Conference, 2010

Solutions for undetected shorts on IEEE 1149.1 self-monitoring pins.
Proceedings of the 2011 IEEE International Test Conference, 2010

2009
Testing bridges to nowhere - combining Boundary Scan and capacitive sensing.
Proceedings of the 2009 IEEE International Test Conference, 2009

What is IEEE P1149.8.1 and why?
Proceedings of the 2009 IEEE International Test Conference, 2009

An outlier detection based approach for PCB testing.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
Boundary-Scan Testing of Power/Ground Pins.
Proceedings of the 2008 IEEE International Test Conference, 2008

Augmenting Boundary-Scan Tests for Enhanced Defect Coverage.
Proceedings of the 2008 IEEE International Test Conference, 2008

2007
Finding power/ground defects on connectors - a new approach.
Proceedings of the 2007 IEEE International Test Conference, 2007

A bead probe CAD strategy for in-circuit test.
Proceedings of the 2007 IEEE International Test Conference, 2007

2005
Bead probes in practice.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

The effects of defects on high-speed boards.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

2004
Board Test Coverage Needs to be Standardized.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

A New Probing Technique for High-Speed/High-Density Printed Circuit Boards.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003
Testing for what?
IEEE Des. Test Comput., 2003

IEEE 1149.6: A Boundary-Scan Standard for Advanced Digital Networks.
IEEE Des. Test Comput., 2003

Defect Coverage of Boundary-Scan Tests: What does it mean when a Boundary-Scan test passes?
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002
Board Test Is NOT Mature.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Test Coverage: What Does It Mean When a Board Test Passes?.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

IEEE P1149.6: A Boundary-Scan Standard for Advanced Digital Networks.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001
Frequency detection-based boundary-scan testing of AC coupled nets.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

2000
System issues in boundary-scan board test.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1997
Design, Fabrications and Use of Mixed-Signal IC Testability Structures.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996
Opens Board Test Coverage: When is 99% Really 40%?
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Introduction ITC 1996 Lecture Series on Unpowered Opens Testing.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995
IEEE Std 1149.1: Where Are We? Where From Here?
IEEE Des. Test Comput., 1995

The ITC Lecture Series: An Experiment.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1994
Observations on the 1149.x Family of Standards.
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993
Structure and Metrology for an Analog Testability Bus.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1991
A language for describing boundary scan devices.
J. Electron. Test., 1991

1989
The impact of boundary scan on board test.
IEEE Des. Test, 1989

1986
Testability: Barriers to Acceptance.
IEEE Des. Test, 1986

1982
Design for Testability - A Survey.
IEEE Trans. Computers, 1982

1979
Testing Logic Networks and Designing for Testability.
Computer, 1979

1978
Sequential Circuit Output Probabilities From Regular Expressions.
IEEE Trans. Computers, 1978

Boolean Network Probabilities and Network Design.
IEEE Trans. Computers, 1978

1975
Analysis of Logic Circuits with Faults Using Input Signal Probabilities.
IEEE Trans. Computers, 1975

Probabilistic Treatment of General Combinational Networks.
IEEE Trans. Computers, 1975


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