Kenneth L. Shepard

Orcid: 0000-0003-0665-6775

According to our database1, Kenneth L. Shepard authored at least 101 papers between 1996 and 2024.

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Awards

IEEE Fellow

IEEE Fellow 2008, "For contributions to computer-aided design of digital integrated circuits".

Timeline

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Bibliography

2024
Time-domain event detection using single-instruction, multiple-thread gpGPU architectures in single-molecule biophysical data.
Comput. Phys. Commun., 2024

A 400-ns-Settling- Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024


BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

A Mechanically Flexible 32-by-32-Element Pitch-Matched Ultrasound Front-End Transceiver with Two-Stage Beamforming for 3D Imaging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

A Wireless Subdural Optical Cortical Interface Device with 768 Co-Packaged Micro-LEDs for Fluorescence Imaging and Optogenetic Stimulation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023
An Integrated-Circuit Node for High-Spatiotemporal Resolution Time-Domain Near-Infrared Diffuse Optical Tomography Imaging Arrays.
IEEE J. Solid State Circuits, May, 2023

A Wireless, Mechanically Flexible, 25μm-Thick, 65, 536-Channel Subdural Surface Recording and Stimulating Microelectrode Array with Integrated Antennas.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Imaging Circuit Activity in the Rat Brain with Fast Neural EIT and Depth Arrays.
Proceedings of the 11th International IEEE/EMBS Conference on Neural Engineering, 2023

A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Fully Implantable 192×256 SPAD Sensor with Global-Shutter and Micro-LEDs for Bidirectional Subdural Optical Brain-Computer Interfaces.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
A Mechanically Flexible, Implantable Neural Interface for Computational Imaging and Optogenetic Stimulation Over 5.4×5.4mm<sup>2</sup> FoV.
IEEE Trans. Biomed. Circuits Syst., 2021

An Integrated 2D Ultrasound Phased Array Transmitter in CMOS With Pixel Pitch-Matched Beamforming.
IEEE Trans. Biomed. Circuits Syst., 2021

A Mechanically Flexible Implantable Neural Interface for Computational Imaging and Optogenetic Stimulation over 5.4 × 5.4 mm <sup>2</sup> FoV.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Integrated-Circuit Node for Time-Domain Near-infrared Diffuse Optical Tomography Imaging Arrays with On-chip Histogramming and Integrated VCSELs.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
A 0.065-mm<sup>3</sup> Monolithically-Integrated Ultrasonic Wireless Sensing Mote for Real-Time Physiological Temperature Monitoring.
IEEE Trans. Biomed. Circuits Syst., 2020

Fully Integrated Time-Gated 3D Fluorescence Imager for Deep Neural Imaging.
IEEE Trans. Biomed. Circuits Syst., 2020

A 0.72 nW, 1 Sample/s Fully Integrated pH Sensor with 65.8 LSB/pH Sensitivity.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A 27-Mbps, 0.08-mm<sup>3</sup> CMOS Transceiver with Simultaneous Near-field Power Transmission and Data Telemetry for Implantable Systems.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A 512-Pixel, 51-kHz-Frame-Rate, Dual-Shank, Lens-Less, Filter-Less Single-Photon Avalanche Diode CMOS Neural Imaging Probe.
IEEE J. Solid State Circuits, 2019

A 512-Pixel 3kHz-Frame-Rate Dual-Shank Lensless Filterless Single-Photon-Avalanche-Diode CMOS Neural Imaging Probe.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 0.6-mm<sup>2</sup> Powering and Data Telemetry System Compatible with Ultrasound B-Mode Imaging for Freely Moving Biomedical Sensor Systems.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A CMOS 2D Transmit Beamformer With Integrated PZT Ultrasound Transducers For Neuromodulation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

Fully Integrated Time-Gated 3D Fluorescence Imager for Deep Neural Imaging.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

2018
Statistically Reconstructed Multiplexing for Very Dense, High-Channel-Count Acquisition Systems.
IEEE Trans. Biomed. Circuits Syst., 2018

Correction to "Statistically Reconstructed Multiplexing for Very Dense, High-Channel-Count Acquisition Systems".
IEEE Trans. Biomed. Circuits Syst., 2018

Single-wire DAC/ADC Control and Feedback of Silicon Photonic Ring Resonator Circuits for Wavelength Switching.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

2017
Hybrid CMOS/GaN 40-MHz Maximum 20-V Input DC-DC Multiphase Buck Converter.
IEEE J. Solid State Circuits, 2017

2016
An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
Matching the Power, Voltage, and Size of Biological Systems: A nW-Scale, 0.023-mm<sup>3</sup> Pulsed 33-GHz Radio Transmitter Operating From a 5 kT/q-Supply Voltage.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors.
Proceedings of the Symposium on VLSI Circuits, 2015

High-channel-count, high-density microelectrode array for closed-loop investigation of neuronal networks.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2014
A 100 fps, Time-Correlated Single-Photon-Counting-Based Fluorescence-Lifetime Imager in 130 nm CMOS.
IEEE J. Solid State Circuits, 2014

Matching the power density and potentials of biological systems: A 3.1-nW, 130-mV, 0.023-mm<sup>3</sup> pulsed 33-GHz radio transmitter in 32-nm SOI CMOS.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

Interfacing CMOS electronics to biological systems: from single molecules to cellular communities.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
Graphene Field-Effect Transistors Based on Boron-Nitride Dielectrics.
Proc. IEEE, 2013

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer.
IEEE J. Solid State Circuits, 2013

On-Chip Combined C-V/I-V Characterization System in 45-nm CMOS Technology.
IEEE J. Solid State Circuits, 2013

Temporal resolution of nanopore sensor recordings.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
A Switched-Inductor Integrated Voltage Regulator With Nonlinear Feedback and Network-on-Chip Load in 45 nm SOI.
IEEE J. Solid State Circuits, 2012

A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm<sup>2</sup>.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

High-throughput biology in the time domain: Improving temporal resolution of single-molecule sensors.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Single-molecule electronic detection using nanoscale field-effect devices.
Proceedings of the 48th Design Automation Conference, 2011

An integrated four-phase buck converter delivering 1A/mm<sup>2</sup> with 700ps controller delay and network-on-chip load in 45-nm SOI.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

Noise and bandwidth performance of single-molecule biosensors.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2009
A 0.18-µm CMOS Array Sensor for Integrated Time-Resolved Fluorescence Detection.
IEEE J. Solid State Circuits, 2009

Design and Analysis of Actively-Deskewed Resonant Clock Networks.
IEEE J. Solid State Circuits, 2009

On-chip transistor characterization arrays with digital interfaces for variability characterization.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2008
Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS.
Proc. IEEE, 2008

A Single-Photon Avalanche Diode Array for Fluorescence Lifetime Imaging Microscopy.
IEEE J. Solid State Circuits, 2008

Active CMOS Sensor Array for Electrochemical Biomolecular Detection.
IEEE J. Solid State Circuits, 2008

A 256x256 CMOS Microelectrode Array for Extracellular Neural Stimulation of Acute Brain Slices.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Characterization and modeling of graphene field-effect devices.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007
Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication.
IEEE J. Solid State Circuits, 2007

Low-Jitter Active Deskewing Through Injection-Locked Resonant Clocking.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

Active CMOS Array for Electrochemical Sensing of Biomolecules.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

On-Chip Circuit for Measuring Period Jitter and Skew of Clock Distribution Networks.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

A CMOS Array Sensor for Sub-800-ps Time-Resolved Fluorescence Detection.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
High-voltage power delivery through charge recycling.
IEEE J. Solid State Circuits, 2006

Active CMOS Array Sensor for Time-Resolved Fluorescence Detection.
IEEE J. Solid State Circuits, 2006

A Continuous-Time Programmable Digital FIR Filter.
IEEE J. Solid State Circuits, 2006

Pulsed current-mode signaling for nearly speed-of-light intrachip communication.
IEEE J. Solid State Circuits, 2006

Distributed Differential Oscillators for Global Clock Networks.
IEEE J. Solid State Circuits, 2006

Distributed Loss Compensation for Low-latency On-chip Interconnects.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Variability and yield improvement: rules, models, and characterization.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2005
Implicit DC-DC downconversion through charge-recycling.
IEEE J. Solid State Circuits, 2005

Uniform-phase uniform-amplitude resonant-load global clock distributions.
IEEE J. Solid State Circuits, 2005

Continuous-time DSPs, analog/digital computers and other mixed-domain circuits.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

New Prospects for Clocking Synchronous and Quasi-Asynchronous Systems.
Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005

Continuous-Time Digital Signal Processors.
Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005

2004
Full-chip, three-dimensional shapes-based RLC extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A fully integrated on-chip DC-DC conversion and power management system.
IEEE J. Solid State Circuits, 2004

High-throughput asynchronous datapath with software-controlled voltage scaling.
IEEE J. Solid State Circuits, 2004

2003
On-chip oscilloscopes for noninvasive time-domain measurement of waveforms in digital integrated circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2003

Charge-Recycling Voltage Domains for Energy-Efficient Low-Voltage Operation of Digital CMOS Circuits.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Design of Resonant Global Clock Distributions.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application.
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

2002
Static noise analysis for digital integrated circuits in partially depleted silicon-on-insulator technology.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Implicit treatment of substrate and power-ground losses in return-limited inductance extraction.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
Body-voltage estimation in digital PD-SOI circuits and itsapplication to static timing analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

CAD Issues for CMOS VLSI Design in SOI.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

On-Chip Oscilloscopes for Noninvasive Time-domain Measurement of Waveforms.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Practical Considerations in RLCK Crosstalk Analysis for Digital Integrated Circuits.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

2000
Return-limited inductances: a practical approach to on-chipinductance extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Static noise analysis for digital integrated circuits in partially-depleted silicon-on-insulator technology.
Proceedings of the 37th Conference on Design Automation, 2000

Cell characterization for noise stability.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
Harmony: static noise analysis of deep submicron digital integrated circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Return-limited inductances: a practical approach to on-chip inductance extraction.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998
Conquering Noise in Deep-Submicron Digital ICs.
IEEE Des. Test Comput., 1998

How will CAD handle billion-transistor systems? (panel).
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Design Methodologies for Noise in Digital Integrated Circuits.
Proceedings of the 35th Conference on Design Automation, 1998

Taming Noise in Deep Submicron Digital Integrated Circuits (Panel).
Proceedings of the 35th Conference on Design Automation, 1998

1997
A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders.
IEEE J. Solid State Circuits, 1997

Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors.
IBM J. Res. Dev., 1997

Design Methodology for the High-Performance G4 S/390.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Global harmony: coupled noise analysis for full-chip RC interconnect networks.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996
Noise in deep submicron digital design.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996


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