Kenneth K. O

Orcid: 0000-0003-3624-1204

Affiliations:
  • University of Texas at Dallas, Richardson, TX, USA
  • University of Florida, Gainesville, FL, USA (former)
  • Massachusetts Institute of Technology (MIT), Cambridge, MA, USA (former, PhD 1989)


According to our database1, Kenneth K. O authored at least 77 papers between 1998 and 2023.

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Bibliography

2023
Silicon Technology Innovation Opportunities for Applications at 0.1 to 1 THz Beyond that for Transistors.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022
300-GHz Double-Balanced Up-Converter Using Asymmetric MOS Varactors in 65-nm CMOS.
IEEE J. Solid State Circuits, 2022

A 430GHz CMOS Concurrent Transceiver Pixel Array for High Angular Resolution Reflection-Mode Active Imaging.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
Terahertz Even-Order Subharmonic Mixer Using Symmetric MOS Varactors.
IEEE J. Solid State Circuits, 2021

A 10-Gb/s 180-GHz Phase-Locked-Loop Minimum Shift Keying Receiver.
IEEE J. Solid State Circuits, 2021

270-to-300GHz Double-Balanced Parametric Upconverter Using Asymmetric MOS Varactors and a Power-Splitting- Transformer Hybrid in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
315-GHz Self-Synchronizing Minimum Shift Keying Receiver in 65-nm CMOS.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A Wideband 180-GHz Phase-Lacked-Loop Based MSK Receiver.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

287-GHz CMOS Transceiver Pixel Array in a QFN Package for Active Imaging.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
Opening Terahertz for Everyday Applications.
IEEE Commun. Mag., 2019

426-GHz Imaging Pixel Integrating a Transmitter and a Coherent Receiver with an Area of 380×47μm<sup>2</sup> in 65-nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Functional Performance of a Millimeter Wave Square Holey Dielectric Waveguide.
Proceedings of the IEEE Radio and Wireless Symposium, 2019

2018
Submillimeter wave manifold diplexer designed in 65 nm CMOS.
Proceedings of the IEEE Topical Conference on Wireless Sensors and Sensor Networks, 2018

Terahertz RF Front-End Employing Even-Order Subharmonic MOS Symmetric Varactor Mixers in 65-NM CMOS for Hydration Measurements at 560 GHz.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

300-GHz CMOS QPSK transmitter for 30-Gbps dielectric waveguide communication.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018


2016
-197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

25.2 A 210-to-305GHz CMOS receiver for rotational spectroscopy.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

20.5 1.4THz, -13dBm-EIRP frequency multiplier chain using symmetric- and asymmetric-CV varactors in 65nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
85-to-127 GHz CMOS Signal Generation Using a Quadrature VCO With Passive Coupling and Broadband Harmonic Combining for Rotational Spectroscopy.
IEEE J. Solid State Circuits, 2015

410-GHz CMOS imager using a 4<sup>th</sup> sub-harmonic mixer with effective NEP of 0.3 fW/Hz<sup>0.5</sup> at 1-kHz noise bandwidth.
Proceedings of the Symposium on VLSI Circuits, 2015

0.65-0.73THz quintupler with an on-chip antenna in 65-nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2015

2014
High-Efficiency Power Amplifier Using an Active Second-Harmonic Injection Technique Under Optimized Third-Harmonic Termination.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

85-to-127 GHz CMOS transmitter for rotational spectroscopy.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

54 GHz CMOS LNAs with 3.6 dB NF and 28.2 dB gain using transformer feedback Gm-boosting technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
Full-Duplex Crystalless CMOS Transceiver With an On-Chip Antenna for Wireless Communication in a Hybrid Engine Controller Board.
IEEE J. Solid State Circuits, 2013

Active Terahertz Imaging Using Schottky Diodes in CMOS: Array and 860-GHz Pixel.
IEEE J. Solid State Circuits, 2013

Schottky diodes in CMOS for terahertz circuits and systems.
Proceedings of the 2013 IEEE Radio and Wireless Symposium, 2013

2012
Compact, High Impedance and Wide Bandwidth Detectors for Characterization of Millimeter Wave Performance.
IEEE J. Solid State Circuits, 2012

Components for generating and phase locking 390-GHz signal in 45-nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2012

280GHz and 860GHz image sensors using Schottky-barrier diodes in 0.13μm digital CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Terahertz image sensors using CMOS Schottky barrier diodes.
Proceedings of the International SoC Design Conference, 2012

2011
Technique for Integration of a Wireless Switch in a 2.4 GHz Single Chip Radio.
IEEE J. Solid State Circuits, 2011

A 280-GHz Schottky Diode Detector in 130-nm Digital CMOS.
IEEE J. Solid State Circuits, 2011

2010
Multi-Level Amplitude Modulation of a 16.8-GHz Class-E Power Amplifier With Negative Resistance Enhanced Power Gain for 400-Mbps Data Transmission.
IEEE J. Solid State Circuits, 2010

Progress and Challenges Towards Terahertz CMOS Integrated Circuits.
IEEE J. Solid State Circuits, 2010

W-band pulsed radar receiver in low cost CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

280-GHz schottky diode detector in 130-nm digital CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
125-GHz Diode Frequency Doubler in 0.13-µm CMOS.
IEEE J. Solid State Circuits, 2009

Towards terahertz operation of CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Paths to terahertz CMOS integrated circuits.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A 24-GHz Transmitter With On-Chip Dipole Antenna in 0.13-µm CMOS.
IEEE J. Solid State Circuits, 2008

A 410GHz CMOS Push-Push Oscillator with an On-Chip Patch Antenna.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Wireless interconnection within a hybrid engine controller board.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A 31.3-dBm Bulk CMOS T/R Switch Using Stacked Transistors With Sub-Design-Rule Channel Length in Floated p-Wells.
IEEE J. Solid State Circuits, 2007

A Ultra-Wideband Amplitude Modulation (AM) Detector Using Schottky Barrier Diodes Fabricated in Foundry CMOS Technology.
IEEE J. Solid State Circuits, 2007

Communication Using Antennas Fabricated in Silicon Integrated Circuits.
IEEE J. Solid State Circuits, 2007

A 21-GHz 8-Modulus Prescaler and a 20-GHz Phase-Locked Loop Fabricated in 130-nm CMOS.
IEEE J. Solid State Circuits, 2007

A 50-GHz Phase-Locked Loop in 0.13-µm CMOS.
IEEE J. Solid State Circuits, 2007

Wireless Clock Distribution System Using an External Antenna.
IEEE J. Solid State Circuits, 2007

A Dual-Band CMOS Transceiver for 3G TD-SCDMA.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

CMOS Millimeter-Wave Signal Sources and Detectors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Millimeter-wave voltage-controlled oscillators in 0.13-μm CMOS technology.
IEEE J. Solid State Circuits, 2006

A Receiver with Start-up Initialization and Programmable Delays for Wireless Clock Distribution.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


A 50-GHz Phase-Locked Loop in 130-nm CMOS.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
15-GHz fully integrated nMOS switches in a 0.13-μm CMOS process.
IEEE J. Solid State Circuits, 2005

A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator.
IEEE J. Solid State Circuits, 2005


An 18-GHz, 10.9-dBm fully-integrated power amplifier with 23.5% PAE in 130-nm CMOS.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

Initialization of a wireless clock distribution system using an external antenna.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
A dual-band CMOS front-end with two gain modes for wireless LAN applications.
IEEE J. Solid State Circuits, 2004

Single-pole double-throw CMOS switches for 900-MHz and 2.4-GHz applications on p<sup>-</sup>silicon substrates.
IEEE J. Solid State Circuits, 2004

10× improvement of power transmission over free space using integrated antennas on silicon substrates.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002
The effects of a ground shield on the characteristics and performance of spiral inductors.
IEEE J. Solid State Circuits, 2002

A fully integrated 1.5-V 5.5-GHz CMOS phase-locked loop.
IEEE J. Solid State Circuits, 2002

Intra-chip wireless interconnect for clock distribution implemented with integrated antennas, receivers, and transmitters.
IEEE J. Solid State Circuits, 2002

Wireless interconnects for clock distribution.
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002

2001
A 0.5-μm CMOS T/R switch for 900-MHz wireless applications.
IEEE J. Solid State Circuits, 2001

Demonstration of a switched resonator concept in a dual-band monolithic CMOS LC-tuned VCO.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

A comparison of CMOS and SiGe LNA's and mixers for wireless LAN application.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
A packaged 1.1-GHz CMOS VCO with phase noise of -126 dBc/Hz at a 600-kHz offset.
IEEE J. Solid State Circuits, 2000

A 900-MHz T/R switch with a 0.8-dB insertion loss implemented in a 0.5-μm CMOS process.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
A high-speed CMOS dual-phase dynamic-pseudo NMOS ((DP)<sup>2</sup>) latch and its application in a dual-modulus prescaler.
IEEE J. Solid State Circuits, 1999

Effects of substrate resistances on LNA performance and a bondpad structure for reducing the effects in a silicon bipolar technology.
IEEE J. Solid State Circuits, 1999

A 900-MHz, 0.8-μm CMOS low noise amplifier with 1.2-dB noise figure.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998
4- and 13-GHz tuned amplifiers implemented in a 0.1-μm CMOS technology on SOI, SOS, and bulk substrates.
IEEE J. Solid State Circuits, 1998


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