Kenji Toda

According to our database1, Kenji Toda authored at least 32 papers between 1983 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2014
Synthesis and Photoluminescence Properties of HEu<sub>1-<i>x</i></sub>Gd<sub><i>x</i></sub>(MoO<sub>4</sub>)<sub>2</sub> Nanophosphor.
IEICE Trans. Electron., 2014

2013
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption.
IEICE Trans. Inf. Syst., 2013

2011
Crystal Growth of Silicate Phosphors from the Vapor Phase.
IEICE Trans. Electron., 2011

2008
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA.
IEICE Trans. Inf. Syst., 2008

Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems.
Proceedings of the Advances in Information and Computer Security, 2008

Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems.
Proceedings of the FPL 2008, 2008

2007
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet.
IEICE Trans. Inf. Syst., 2007

A Secure Digital Content Delivery System Based on Partially Reconfigurable Hardware.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2006
New Silicate Phosphors for a White LED.
IEICE Trans. Electron., 2006

A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Highly Efficient String Matching Circuit for IDS with FPGA.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2005
FPGA-Based Content Protection System for Embedded Consumer Electronics.
Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 2005

Dynamic Load Balancing Using Network Transferable Computer.
Proceedings of the 25th International Conference on Distributed Computing Systems Workshops (ICDCS 2005 Workshops), 2005

2004
A tsume-shogi processor based on reconfigurable hardware.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003
Adaptable Load Balancing Using Network Transferable Computer Associated with Mobile IP.
Proceedings of the 23rd International Conference on Distributed Computing Systems Workshops (ICDCS 2003 Workshops), 2003

2000
A Flexible Scheduling for Automobile Control Using Imprecise Computation and Its Fundamental Evaluation.
Proceedings of the 6th International Conference on Engineering of Complex Computer Systems (ICECCS 2000), 2000

1999
Real-world applications of analog and digital evolvable hardware .
IEEE Trans. Evol. Comput., 1999

1998
Automation of Chamfering by an industrial Robot, for the Case of Machined Hole on a Cylindrical Workpiece.
Proceedings of the IEEE International Conference on Robotics and Automation, 1998

1997
CODA-R: a reconfigurable testbed for real-time parallel computation.
Proceedings of the 4th International Workshop on Real-Time Computing Systems and Applications (RTCSA '97), 1997

1995
Performance comparison of real-time architectures using simulation.
Proceedings of the 2nd International Workshop on Real-Time Computing Systems and Applications, October 25, 1995

1994
A Priority Forwarding Router Chip for Real-Time Interconnection Networks.
Proceedings of the 15th IEEE Real-Time Systems Symposium (RTSS '94), 1994

The Execution Model and the Architecture for Real-Time Parallel Systems.
Proceedings of the Technology and Foundations - Information Processing '94, Volume 1, Proceedings of the IFIP 13th World Computer Congress, Hamburg, Germany, 28 August, 1994

1993
The Hardware Architecture of the CODA Real-Time Parallel Processor.
Proceedings of the Parallel Computing: Trends and Applications, 1993

1992
Real-Time Parallel Architecture for Sensor Funsion.
J. Parallel Distributed Comput., 1992

A priority forwarding scheme for real-time multistage interconnection networks.
Proceedings of the Real-Time Systems Symposium, 1992

1991
Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism.
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

1990
Evaluation of a Data-Driven Machine with Advanced Control Mechanism.
Syst. Comput. Jpn., 1990

1989
The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer.
Proceedings of the PARLE '89: Parallel Architectures and Languages Europe, 1989

1986
DBCL: Data-Flow Computing Base Language with n-Value Logic.
Proceedings of the Fall Joint Computer Conference, November 2-6, 1986, Dallas, Texas, USA, 1986

1984
EM-3: A Lisp-Based Data-Driven Machine.
Proceedings of the International Conference on Fifth Generation Computer Systems, 1984

1983
A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3)
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983


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