Kenji Kawai

According to our database, Kenji Kawai authored at least 12 papers between 1995 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Tectonism of Late Noachian Mars: Surface Signatures from the Southern Highlands.

Trishit Ruj, Goro Komatsu, Gene Schmidt, Suniti Karunatillake, Kenji Kawai

Remote. Sens., 2022

2015

Practical resource scheduling in massive-cell deployment for 5G mobile communications systems.

Yuki Arikawa, Kenji Kawai, Hiroyuki Uzawa, Satoshi Shigematsu

Proceedings of the 2015 International Symposium on Intelligent Signal Processing and Communication Systems, 2015

Data transmission scheme for enhancing effective downlink bandwidth in 5G mobile fronthaul with TDM-PON.

Hiroyuki Uzawa, Yuki Arikawa, Kenji Kawai, Satoshi Shigematsu

Proceedings of the European Conference on Optical Communication, 2015

2011

Population-averaged standard template brain atlas for the common marmoset (Callithrix jacchus).

Keigo Hikishima, M. M. Quallo, Yuki Komaki, Masayuki Yamada, Kenji Kawai, Suketaka Momoshima, Hirotaka James Okano, Erika Sasaki, N. Tamaoki, R. N. Lemon, Atsushi Iriki, Hideyuki Okano

NeuroImage, 2011

2010

A 2Gb/s network processor with a 24mW IPsec offload for residential gateways.

Yukikuni Nishida, Kenji Kawai, Keiichi Koike

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2005

Physical Layer OAM&P Signaling Method for 10 Gbit/s Ethernet Transport over Optical Networks.

Kazuhiko Terada, Kenji Kawai, Osamu Ishida, Keiji Kishine, Noboru Iwasaki, Haruhiko Ichino

IEICE Trans. Commun., 2005

2000

A 0.6-W 10-Gb/s SONET/SDH bit-error-rate monitoring LSI.

Kenji Kawai, Haruhiko Ichino

IEEE J. Solid State Circuits, 2000

Robust photonic transport network implementation with optical cross-connect systems.

Satoru Okamoto, Masafumi Koga, Hiro Suzuki, Kenji Kawai

IEEE Commun. Mag., 2000

1999

A 557-mW, 2.5-Gbit/s SONET/SDH regenerator-section terminating LSI chip using low-power bipolar-LSI design.

Kenji Kawai, Keiichi Koike, Yuichiro Takei, Akira Onozawa, Hitoshi Obara, Haruhiko Ichino

IEEE J. Solid State Circuits, 1999

1998

High-speed, low-power, bipolar standard cell design methodology for Gbit/s signal processing.

Keiichi Koike, Kenji Kawai, Akira Onozawa, Yuichiro Takei, Yoshiji Kobayashi, Haruhiko Ichino

IEEE J. Solid State Circuits, 1998

1997

An Efficient Paired-net Routing Algorithm for High-speed Bipolar LSIs.

Yuichiro Takei, Akira Onozawa, Kenji Kawai, Hitoshi Kitazawa

Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1995

Post-layout optimization of power and timing for ECL LSIs.

Akira Onozawa, Hitoshi Kitazawa, Kenji Kawai

Proceedings of the 1995 European Design and Test Conference, 1995