Kenichi Ohhata
Orcid: 0000-0002-0674-0830
According to our database1,
Kenichi Ohhata
authored at least 29 papers
between 1989 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
1990
1995
2000
2005
2010
2015
2020
0
1
2
3
4
1
1
2
2
1
2
1
1
1
2
2
1
1
2
1
1
1
1
2
1
2
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
2022
A High-Time-Resolution Time-to-Digital Converter Using Coupled Ring Oscillator with Phase Averaging.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
A PVT-Robust Closed-Loop Dynamic Amplifier Using Three-Stage Floating Inverter Amplifier.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021
2019
A 2.3-mW, 1-GHz, 8-Bit Fully Time-Based Two-Step ADC Using a High-Linearity Dynamic VTC.
IEEE J. Solid State Circuits, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
A 2.3-MW, 950-MHz, 8-Bit Fully-Time-Based Subranging ADC Using Highly-Linear Dynamic VTC.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018
2014
1-GHz, 17.5-mW, 8-bit Subranging ADC Using Offset-Cancelling Charge-Steering Amplifier.
IEICE Trans. Electron., 2014
Automatic technique of distortion compensation in resistor ladder for high-speed and low-power ADC.
IEICE Electron. Express, 2014
Automatic adjustment system for optical interconnection transmitter using improved particle swarm optimization.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
2011
A 25 Gb/s 65-nm CMOS Low-Power Laser Diode Driver With Mutually Coupled Peaking Inductors for Optical Interconnects.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEICE Trans. Electron., 2011
2010
17 Gb/s VCSEL driver using double-pulse asymmetric emphasis technique in 90-nm CMOS for optical interconnection.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A 25Gb/s laser diode driver with mutually coupled peaking inductors for optical interconnects.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
Design of a 770-MHz, 70-mW, 8-bit Subranging ADC Using Reference Voltage Precharging Architecture.
IEEE J. Solid State Circuits, 2009
2008
Sandwich Structure Type RF-MEMS Variable Capacitor with Low Voltage Controllability and Wide Tuning Range.
IEICE Trans. Commun., 2008
Feedthrough reduction technique for track-and-hold circuit with body-bias control circuit.
IEICE Electron. Express, 2008
2007
IEICE Electron. Express, 2007
2006
IEICE Trans. Electron., 2006
2005
SiGe-HBT-based 54-gb/s 4: 1 multiplexer IC with full-rate clock for serial communication systems.
IEEE J. Solid State Circuits, 2005
2000
Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz.
IEEE J. Solid State Circuits, 2000
1999
Design of a 32.7-GHz bandwidth AGC amplifier IC with wide dynamic range implemented in SiGe HBT.
IEEE J. Solid State Circuits, 1999
A wide-dynamic-range, high-transimpedance Si bipolar preamplifier IC for 10-Gb/s optical fiber links.
IEEE J. Solid State Circuits, 1999
1996
A soft-error-immune 0.9-ns 1.15-Mb ECL-CMOS SRAM with 30-ps 120 k logic gates and on-chip test circuitry.
IEEE J. Solid State Circuits, 1996
1995
IEEE J. Solid State Circuits, April, 1995
1992
IEEE J. Solid State Circuits, April, 1992
IEEE J. Solid State Circuits, February, 1992
1989
IEEE J. Solid State Circuits, October, 1989