Kenichi Inagaki

According to our database, Kenichi Inagaki authored at least 5 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Experimental assessment of logic circuit performance variability with regular fabrics at 90nm technology node.

Sungdae Choi, Katsuyuki Ikeuchi, Hyunkyung Kim, Kenichi Inagaki, Masami Murakata, Nobuyuki Nishiguchi, Makoto Takamiya, Takayasu Sakurai

Proceedings of the ESSCIRC 2008, 2008

2007

Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs.

Kohei Onizuka, Kenichi Inagaki, Hiroshi Kawaguchi, Makoto Takamiya, Takayasu Sakurai

IEEE J. Solid State Circuits, 2007

2006

Trends of On-Chip Interconnects in Deep Sub-Micron VLSI.

Danardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, Takayasu Sakurai

IEICE Trans. Electron., 2006

Simple Waveform Model of Inductive Interconnects by Delayed Quadratic Transfer Function with Application to Scaling Trend of Inductive Effects in VLSI's.

Danardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, Takayasu Sakurai

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

2005

Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-<i>V_DD</i> SRAM's.

Kyeong-Sik Min, Kouichi Kanda, Hiroshi Kawaguchi, Kenichi Inagaki, Fayez Robert Saliba, Hoon-Dae Choi, Hyun-Young Choi, Daejeong Kim, Dong Myong Kim, Takayasu Sakurai

IEICE Trans. Electron., 2005