Ken Asano

According to our database1, Ken Asano authored at least 4 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2024
Error-Tolerance-Aware Write-Energy Reduction of MTJ-Based Quantized Neural Network Hardware.
IEICE Trans. Inf. Syst., 2024

Error-Tolerant Quantized Neural Network Based on Non-Weighted Arithmetic.
Proceedings of the 54th IEEE International Symposium on Multiple-Valued Logic, 2024

2023
Write-Energy Relaxation of MTJ-Based Quantized Neural-Network Hardware.
Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023

Error-Sensitivity-Aware Write-Energy Optimization for an MTJ-Based Binarized Neural Network.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023


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