Keith A. Jenkins
According to our database1,
Keith A. Jenkins
authored at least 37 papers
between 1996 and 2018.
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Bibliography
2018
Proceedings of the IEEE International Reliability Physics Symposium, 2018
Estimating transistor channel temperature using time-resolved and time-integrated NIR emission.
Proceedings of the IEEE International Reliability Physics Symposium, 2018
2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
2015
A Ring-Oscillator-Based Reliability Monitor for Isolated Measurement of NBTI and PBTI in High-k/Metal Gate Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2015
The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking.
IEEE J. Solid State Circuits, 2015
Self-heating characterization of FinFET SOI devices using 2D time resolved emission measurements.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the IEEE International Reliability Physics Symposium, 2015
2014
Microelectron. Reliab., 2014
5.3 Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8<sup>TM</sup> microprocessor.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
Microelectron. Reliab., 2013
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
Performance impact of through-silicon vias (TSVs) in three-dimensional technology measured by SRAM ring oscillators.
Proceedings of the ESSCIRC 2013, 2013
2011
A simple array-based test structure for the AC variability characterization of MOSFETs.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2009
A Local Random Variability Detector With Complete Digital On-Chip Measurement Circuitry.
IEEE J. Solid State Circuits, 2009
A Scalable, Digital BIST Circuit for Measurement and Compensation of Static Phase Offset.
Proceedings of the 27th IEEE VLSI Test Symposium, 2009
2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
An On-Chip Test Structure and Digital Measurement Method for Statistical Characterization of Local Random Variability in a Process.
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
Statistical Characterization and On-Chip Measurement Methods for Local Random Variability of a Process Using Sense-Amplifier-Based Test Structure.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2005
Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection.
IBM J. Res. Dev., 2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the 9th European Test Symposium, 2004
2003
Application of an SOI 0.12-µm CMOS technology to SoCs with low-power and high-frequency circuits.
IBM J. Res. Dev., 2003
2001
2000
IEEE Des. Test Comput., 2000
1998
Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor.
IEEE J. Solid State Circuits, 1998
IEEE J. Solid State Circuits, 1998
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998
1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
1996
IEEE J. Solid State Circuits, 1996
IEEE J. Solid State Circuits, 1996