Keisuke Mashita

According to our database, Keisuke Mashita authored at least 5 papers between 2015 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

A Waiting Mechanism with Conflict Prediction on Hardware Transactional Memory.

Keisuke Mashita, Maya Tabuchi, Ryohei Yamada, Tomoaki Tsumura

IEICE Trans. Inf. Syst., 2016

Exclusive control for compound operations on hardware transactional memory.

Keisuke Mashita, Anju Hirota, Tomoaki Tsumura

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

A Concurrency Control in Hardware Transactional Memory Considering Execution Path Variation.

Anju Hirota, Keisuke Mashita, Tomoaki Tsumura

Proceedings of the Fourth International Symposium on Computing and Networking, 2016

2015

Eliminating Cascading Stall on Hardware Transactional Memory.

Sho Miyake, Keisuke Mashita, Ryohei Yamada, Tomoaki Tsumura

Proceedings of the Third International Symposium on Computing and Networking, 2015

Yet Another Waiting Mechanism Based on Conflict Prediction for Hardware Transactional Memory.

Keisuke Mashita, Sho Miyake, Ryohei Yamada, Tomoaki Tsumura

Proceedings of the Third International Symposium on Computing and Networking, 2015