Keiki Watanabe

According to our database1, Keiki Watanabe authored at least 5 papers between 2011 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2020
A 22-ng/ $\surd$ Hz 17-mW Capacitive MEMS Accelerometer With Electrically Separated Mass Structure and Digital Noise- Reduction Techniques.
IEEE J. Solid State Circuits, 2020

2019
A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction Techniques.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
Design of Perforated Membrane for Low-Noise Capacitive MEMS Accelerometers.
Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

2011
A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link.
IEEE J. Solid State Circuits, 2011

10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011


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