Keiichi Tokutome
According to our database1,
Keiichi Tokutome
authored at least 3 papers
between 2009 and 2014.
Collaborative distances:
Collaborative distances:
Timeline
2009
2010
2011
2012
2013
2014
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2014
A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2012
1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times.
Proceedings of the Symposium on VLSI Circuits, 2012
2009