Keiichi Nakazawa

According to our database, Keiichi Nakazawa authored at least 1 paper in 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide-Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency.

Koichiro Zaitsu, Akira Matsumoto, Mizuki Nishida, Yusuke Tanaka, Hirofumi Yamashita, Yosuke Satake, Takashi Watanabe, Kunihiko Araki, Naoki Nei, Keiichi Nakazawa, Junpei Yamamoto, Mutsuo Uehara, Hiroyuki Kawashima, Yusaku Kobayashi, Tomoyuki Hirano, Keiji Tatani

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022