Kefei Liu

According to our database, Kefei Liu authored at least 12 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

How the Brain Achieves Real-Time Vision: A Spiking Position Perception Model.

Kefei Liu, Jingjie Shang, Xiaoxin Cui, Chenglong Zou, Yisong Kuang, Kanglin Xiao, Yi Zhong, Yuan Wang

IEEE Trans. Cogn. Dev. Syst., June, 2024

2023

Real-Time Target Tracking System With Spiking Neural Networks Implemented on Neuromorphic Chips.

Kefei Liu, Xiaoxin Cui, Xiang Ji, Yisong Kuang, Chenglong Zou, Yi Zhong, Kanglin Xiao, Yuan Wang

IEEE Trans. Circuits Syst. II Express Briefs, April, 2023

2022

ESSA: Design of a Programmable Efficient Sparse Spiking Neural Network Accelerator.

Yisong Kuang, Xiaoxin Cui, Zilin Wang, Chenglong Zou, Yi Zhong, Kefei Liu, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang

IEEE Trans. Very Large Scale Integr. Syst., 2022

Modular building blocks for mapping spiking neural networks onto a programmable neuromorphic processor.

Chenglong Zou, Xiaoxin Cui, Guang Chen, Shuo Feng, Kefei Liu, Xinan Wang, Yuan Wang

Microelectron. J., 2022

An Event-driven Spiking Neural Network Accelerator with On-chip Sparse Weight.

Yisong Kuang, Xiaoxin Cui, Chenglong Zou, Yi Zhong, Zhenhui Dai, Zilin Wang, Kefei Liu, Dunshan Yu, Yuan Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Full-Neuron Memory Model Designed for Neuromorphic Systems.

Kefei Liu, Xiaoxin Cui, Chenglong Zou, Yisong Kuang, Yi Zhong, Kanglin Xiao, Yuan Wang

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS.

Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou, Zhenhui Dai, Yuan Wang, Dunshan Yu, Ru Huang

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Spike-Event-Based Neuromorphic Processor with Enhanced On-Chip STDP Learning in 28nm CMOS.

Yi Zhong, Xiaoxin Cui, Yisong Kuang, Kefei Liu, Yuan Wang, Ru Huang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations.

Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An SNN-Based and Neuromorphic-Hardware-Implementable Noise Filter with Self-adaptive Time Window for Event-Based Vision Sensor.

Kanglin Xiao, Xiaoxin Cui, Kefei Liu, Xiaole Cui, Xin'an Wang

Proceedings of the International Joint Conference on Neural Networks, 2021

2017

Improving DFA on AES using all-fault ciphertexts.

Yewen Ni, Xiaoxin Cui, Tian Wang, Yuanning Fan, Qiankun Han, Kefei Liu, Xiaole Cui

Proceedings of the 12th IEEE International Conference on ASIC, 2017

Design of router for spiking neural networks.

Yewen Ni, Xiaoxin Cui, Yuanning Fan, Qiankun Han, Kefei Liu, Xiaole Cui

Proceedings of the 12th IEEE International Conference on ASIC, 2017