Keerthi Heragu
According to our database1,
Keerthi Heragu
authored at least 16 papers
between 1994 and 2008.
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2008
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2008
A 45nm 3.5G Baseband-and-Multimedia Application Processor using Adaptive Body-Bias and Ultra-Low-Power Techniques.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2005
A 6.25-Gb/s binary transceiver in 0.13-μm CMOS for serial data transmission across high loss legacy backplane channels.
IEEE J. Solid State Circuits, 2005
2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
2001
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
1999
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999
1998
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
1996
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
1994
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994
Proceedings of the 31st Conference on Design Automation, 1994