Keejong Kim

According to our database, Keejong Kim authored at least 15 papers between 2005 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Robust Level Converter for Sub-Threshold/Super-Threshold Operation: 100 mV to 2.5 V.

Ik Joon Chang, Jae-Joon Kim, Keejong Kim, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2011

2010

On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures.

Kunhyuk Kang, Sang Phill Park, Keejong Kim, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2010

2008

A Low-Power SRAM Using Bit-Line Charge-Recycling.

Keejong Kim, Hamid Mahmoodi, Kaushik Roy

IEEE J. Solid State Circuits, 2008

Process variation tolerant SRAM array for ultra low voltage applications.

Jaydeep P. Kulkarni, Keejong Kim, Sang Phill Park, Kaushik Roy

Proceedings of the 45th Design Automation Conference, 2008

2007

Design of a Process Variation Tolerant Self-Repairing SRAM for Yield Enhancement in Nanoscaled CMOS.

Saibal Mukhopadhyay, Keejong Kim, Hamid Mahmoodi, Kaushik Roy

IEEE J. Solid State Circuits, 2007

A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM.

Jaydeep P. Kulkarni, Keejong Kim, Kaushik Roy

IEEE J. Solid State Circuits, 2007

FinFET Based SRAM Design for Low Standby Power Applications.

Tamer Cakici, Keejong Kim, Kaushik Roy

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A 160 mV, fully differential, robust schmitt trigger based sub-threshold SRAM.

Jaydeep P. Kulkarni, Keejong Kim, Kaushik Roy

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

A low-power SRAM using bit-line charge-recycling technique.

Keejong Kim, Hamid Mahmoodi, Kaushik Roy

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop.

Kunhyuk Kang, Keejong Kim, Kaushik Roy

Proceedings of the 44th Design Automation Conference, 2007

Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement.

Kunhyuk Kang, Keejong Kim, Ahmad E. Islam, Muhammad Ashraful Alam, Kaushik Roy

Proceedings of the 44th Design Automation Conference, 2007

Process-Tolerant Low-Power Adaptive Pipeline under Scaled-Vdd.

Swaroop Ghosh, Pooja Batra, Keejong Kim, Kaushik Roy

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Low-Power and Process Variation Tolerant Memories in sub-90nm Technologies.

Saibal Mukhopadhyay, Swaroop Ghosh, Keejong Kim, Kaushik Roy

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM.

Swaroop Ghosh, Saibal Mukhopadhyay, Keejong Kim, Kaushik Roy

Proceedings of the 43rd Design Automation Conference, 2006

2005

TFT-LCD Application Specific Low Power SRAM Using Charge-Recycling Technique.

Keejong Kim, Chris H. Kim, Kaushik Roy

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005