Ke Chen
Orcid: 0000-0003-0981-3166Affiliations:
- Northeastern University, Department of Electrical and Computer Engineering, Boston, MA, USA
According to our database1,
Ke Chen
authored at least 42 papers
between 2015 and 2025.
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
On csauthors.net:
Bibliography
2025
LAHDC: Logic-Aggregation-Based Query for Embedded Hyperdimensional Computing Accelerator.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025
2024
AttnACQ: Attentioned-AutoCorrelation-Based Query for Hyperdimensional Associative Memory.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2024
A Potential Enabler for High-Performance In-Memory Multi-Bit Arithmetic Schemes With Unipolar Switching SOT-MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2024
Toward Efficient Retraining: A Large-Scale Approximate Neural Network Framework With Cross-Layer Optimization.
IEEE Trans. Very Large Scale Integr. Syst., June, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024
Fully Learnable Hyperdimensional Computing Framework With Ultratiny Accelerator for Edge-Side Applications.
IEEE Trans. Computers, February, 2024
Label-Efficient Point Cloud Semantic Segmentation: A Holistic Active Learning Approach.
World Sci. Annu. Rev. Artif. Intell., 2024
Guest Editorial: Special Section on "Approximate Data Processing: Computing, Storage and Applications".
IEEE Trans. Emerg. Top. Comput., 2024
A High-accuracy Time-efficient Error Metric Model for Approximate Computing Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Most Significant One-Driven Shifting Dynamic Efficient Multipliers for Large Language Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space Exploration.
Proceedings of the 31st IEEE Symposium on Computer Arithmetic, 2024
2023
IEEE Trans. Computers, July, 2023
Hardware Efficient Successive-Cancellation Polar Decoders Using Approximate Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
IEEE Trans. Very Large Scale Integr. Syst., 2023
An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs.
IEEE Trans. Emerg. Top. Comput., 2023
MLiM: High-Performance Magnetic Logic in-Memory Scheme With Unipolar Switching SOT-MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023
VLCP: A High-Performance FPGA-based CNN Accelerator with Vector-level Cluster Pruning.
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023
A High Accuracy and Hardware Efficient Adaptive Filter Design with Approximate Computing.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Hardware-Efficient Accurate and Approximate FPGA Multipliers for Error-Tolerant Applications.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
GBC: An Energy-Efficient LSTM Accelerator With Gating Units Level Balanced Compression Strategy.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation.
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022
Energy-efficient Oriented Approximate Quantization Scheme for Fine-Grained Sparse Neural Network Acceleration.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Data Stream Oriented Fine-grained Sparse CNN Accelerator with Efficient Unstructured Pruning Strategy.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
An Energy-efficient and High-precision Approximate MAC with Distributed Arithmetic Circuits.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
An Energy-Efficient Approximate Floating-Point Multipliers for Wireless Communications.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
Proceedings of the Approximate Computing, 2022
2021
IEEE Trans. Emerg. Top. Comput., 2021
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
2020
IEEE Trans. Circuits Syst., 2020
2019
Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC).
IEEE Trans. Computers, 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
2016
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015