Ke Bai

Affiliations:
  • Arizona State University, Compiler Microarchitecture Lab, Tempe, USA (PhD 2014)


According to our database1, Ke Bai authored at least 11 papers between 2010 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Efficient Code Assignment Techniques for Local Memory on Software Managed Multicores.
ACM Trans. Embed. Comput. Syst., 2015

2014
Compiler and Runtime for Memory Management on Software Managed Manycore Processors.
PhD thesis, 2014

Construction of GCCFG for inter-procedural optimizations in Software Managed Manycore (SMM) architectures.
Proceedings of the 2014 International Conference on Compilers, 2014

2013
A software-only scheme for managing heap data on limited local memory(LLM) multicore processors.
ACM Trans. Embed. Comput. Syst., 2013

Automatic and efficient heap data management for limited local memory multicore architectures.
Proceedings of the Design, Automation and Test in Europe, 2013

SSDM: smart stack data management for software managed multicores (SMMs).
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

CMSM: An efficient and effective Code Management for Software Managed Multicores.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

2011
Vector class on limited local memory (LLM) multi-core processors.
Proceedings of the 14th International Conference on Compilers, 2011

Stack data management for Limited Local Memory (LLM) multi-core processors.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

2010
Heap data management for limited local memory (LLM) multi-core processors.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

Dynamic code mapping for limited local memory systems.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010


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