Kazuyuki Wada
Orcid: 0000-0002-6246-8819
According to our database1,
Kazuyuki Wada
authored at least 29 papers
between 1995 and 2024.
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Bibliography
2024
An Output Voltage Estimation and Regulation System Using Only the Primary-Side Electrical Parameters for Wireless Power Transfer Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., January, 2024
A Low-Power Lock-in Amplifier Suitable for Implementation on a Programmable System on-Chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2021
2020
Quantum Inf. Process., 2020
2018
Multilevel pre-equalization using an analog FIR filter with multiple binary delay lines for 20-Gb/s 4-PAM multimode fiber transmission.
IEICE Electron. Express, 2018
2017
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
2009
IEEE J. Solid State Circuits, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
A 0.8-V Syllabic-Companding Log Domain Filter with 78-dB Dynamic Range in 0.35-µm CMOS.
IEICE Trans. Electron., 2008
2007
Band Connections for Digital Substrate Noise Reduction Using Active Cancellation Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
Active Shield Circuit for Digital Noise Suppression in Mixed-Signal Integrated Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise Evaluation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Wide-Input Range Linear Voltage-to-Current Converter Using Equivalent MOSFETs without Cutoff Region.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
Design of a body-effect reduced-source follower and its application to linearization technique.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Novel voltage-regulating circuit for low-voltage and low-power OTA realization using MOSFETs in the non-saturation region.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1995
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995