Kazuyoshi Ueno

According to our database, Kazuyoshi Ueno authored at least 2 papers between 2007 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2022

Present Status and Prospect of Graphene Interconnect Applications.

Kazuyoshi Ueno

IEICE Trans. Electron., October, 2022

2007

Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation.

Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno

IEICE Trans. Electron., 2007