Kazuyoshi Muraoka

According to our database1, Kazuyoshi Muraoka authored at least 4 papers between 1989 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

1990
1995
2000
2005
2010
2015
0
1
2
1
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
A Low Power 64 Gb MLC NAND-Flash Memory in 15 nm CMOS Technology.
IEEE J. Solid State Circuits, 2016

2015

1990
A latch-up-like new failure mechanism for high-density CMOS dynamic RAMs.
IEEE J. Solid State Circuits, February, 1990

1989
An experimental 2-bit/cell storage DRAM for macrocell or memory-on-logic application.
IEEE J. Solid State Circuits, April, 1989


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