Kazuya Ishida
According to our database1,
Kazuya Ishida
authored at least 2 papers
between 2004 and 2008.
Collaborative distances:
Collaborative distances:
Timeline
2004
2005
2006
2007
2008
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1
2
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Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2008
Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors.
IEEE J. Solid State Circuits, 2008
2004
Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH.
Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004