Kazunori Furusawa
According to our database1,
Kazunori Furusawa
authored at least 6 papers
between 1989 and 2010.
Collaborative distances:
Collaborative distances:
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Bibliography
2010
Proceedings of the American Control Conference, 2010
2007
A 126 mm<sup>2</sup> 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology.
IEICE Trans. Electron., 2007
2006
A 130-nm CMOS 95-mm<sup>2</sup> 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput.
IEICE Trans. Electron., 2006
2001
IEEE J. Solid State Circuits, 2001
1999
A 256-Mb multilevel flash memory with 2-MB/s program rate for mass storage applications.
IEEE J. Solid State Circuits, 1999
1989
IEEE J. Solid State Circuits, December, 1989