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Kazunari Ishimaru

Orcid: 0000-0003-3170-9410

According to our database1, Kazunari Ishimaru authored at least 3 papers between 2006 and 2021.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Awards

IEEE Fellow

IEEE Fellow 2014, "For contributions to static random access memory and complementary metal-oxide semiconductor devices".

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Challenges of Flash Memory for Next Decade.
[BibTeX]
[DOI]
Kazunari Ishimaru
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2007
45nm/32nm CMOS ˜ Challenge and Perspective ˜.
[BibTeX]
[DOI]
Kazunari Ishimaru
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
Low-power logic circuit and SRAM cell applications with silicon on depletion Layer CMOS (SODEL CMOS) technology.
[BibTeX]
[DOI]
Satoshi Inaba
,
Hajime Nagano
,
Kiyotaka Miyano
,
Ichiro Mizushima
,
Yasunori Okayama
,
Takahiro Nakauchi
,
Kazunari Ishimaru
,
Hidemi Ishiuchi
IEEE J. Solid State Circuits, 2006


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