Kazuhisa Miyamoto

According to our database, Kazuhisa Miyamoto authored at least 2 papers between 2000 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2001

Design methodology of high performance microprocessor using ultra-low threshold voltage CMOS.

Tamotsu Miyake, Takeo Yamashita, Norikatsu Asari, Hideki Sekisaka, Tom Sakai, Kazuhiro Matsuura, Atsushi Wakahara, Hideyuki Takahashi, Tom Hiyama, Kazuhisa Miyamoto, Kazutaka Mori

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000

Delay-optimal wiring plan for the microprocessor of high performance computing machines.

Jun Kikuchi, Tetsuo Sasaki, Tohru Hashimoto, Kazuhisa Miyamoto

Proceedings of ASP-DAC 2000, 2000